small touch-ups

--HG--
extra : convert_revision : svn%3A39bc706e-5318-0410-9160-8a85361fbb7c/trunk%40112
This commit is contained in:
David Anderson 2006-10-10 16:39:55 +00:00
parent d2cb27e20c
commit f62af67279
6 changed files with 14 additions and 7 deletions

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@ -12,7 +12,7 @@ EXPORTFUNC void GiveEnginePointer(SourcePawn::ISourcePawnEngine *engine_p)
EXPORTFUNC unsigned int GetExportCount() EXPORTFUNC unsigned int GetExportCount()
{ {
return 0; return 1;
} }
EXPORTFUNC SourcePawn::IVirtualMachine *GetExport(unsigned int exportnum) EXPORTFUNC SourcePawn::IVirtualMachine *GetExport(unsigned int exportnum)

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@ -1138,7 +1138,7 @@ inline void WriteOp_Retn(JitWriter *jit)
/* pop params */ /* pop params */
//mov ecx, [edi] //mov ecx, [edi]
//lea edi, [edi+edi*4+4] //lea edi, [edi+ecx*4+4]
IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_MEM_REG); IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_MEM_REG);
IA32_Lea_Reg_DispRegMultImm8(jit, AMX_REG_STK, AMX_REG_STK, AMX_REG_TMP, SCALE4, 4); IA32_Lea_Reg_DispRegMultImm8(jit, AMX_REG_STK, AMX_REG_STK, AMX_REG_TMP, SCALE4, 4);
@ -1538,7 +1538,9 @@ sp_context_t *JITX86::CompileToContext(ICompilation *co, int *err)
OPCODE op; OPCODE op;
int op_c; int op_c;
/* FIRST PASS (light load) - Get initial opcode information */ /* FIRST PASS (light load) - Get initial opcode information
* :TODO: remove this pass soon, it's not needed anymore!
*/
for (cip = code; cip < end_cip;) for (cip = code; cip < end_cip;)
{ {
op = (OPCODE)*(ucell_t *)cip; op = (OPCODE)*(ucell_t *)cip;

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@ -69,7 +69,7 @@ jitoffs_t RelocLookup(JitWriter *jit, cell_t pcode_offs, bool relative=false);
#define AMX_INFO_RETVAL 8 //physical #define AMX_INFO_RETVAL 8 //physical
#define AMX_INFO_CONTEXT 12 //physical #define AMX_INFO_CONTEXT 12 //physical
#define AMX_INFO_STACKTOP 16 //relocated #define AMX_INFO_STACKTOP 16 //relocated
#define AMX_INFO_HEAPLOW 20 //not relocated #define AMX_INFO_HEAPLOW 20 //not relocated. currently unused
#define AMX_INFO_STACKTOP_U 24 //not relocated #define AMX_INFO_STACKTOP_U 24 //not relocated
extern ISourcePawnEngine *engine; extern ISourcePawnEngine *engine;

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@ -322,7 +322,6 @@ void Macro_PushN_Addr(JitWriter *jit, int i)
IA32_Lea_DispRegImm32(jit, AMX_REG_TMP, AMX_REG_PRI, val); IA32_Lea_DispRegImm32(jit, AMX_REG_TMP, AMX_REG_PRI, val);
IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n); IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n);
} while (n++ < i); } while (n++ < i);
//:TODO: fix the case of this size > imm8!
IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG); IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG);
IA32_Pop_Reg(jit, AMX_REG_PRI); IA32_Pop_Reg(jit, AMX_REG_PRI);
} }

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@ -56,9 +56,11 @@ inline void WriteOp_Align_Pri(JitWriter *jit)
//xor eax, <cellsize - val> //xor eax, <cellsize - val>
cell_t val = sizeof(cell_t) - jit->read_cell(); cell_t val = sizeof(cell_t) - jit->read_cell();
if (val < SCHAR_MAX && val > SCHAR_MIN) if (val < SCHAR_MAX && val > SCHAR_MIN)
{
IA32_Xor_Rm_Imm8(jit, AMX_REG_PRI, MOD_REG, (jit_int8_t)val); IA32_Xor_Rm_Imm8(jit, AMX_REG_PRI, MOD_REG, (jit_int8_t)val);
else } else {
IA32_Xor_Eax_Imm32(jit, val); IA32_Xor_Eax_Imm32(jit, val);
}
} }
inline void WriteOp_Align_Alt(JitWriter *jit) inline void WriteOp_Align_Alt(JitWriter *jit)
@ -66,9 +68,11 @@ inline void WriteOp_Align_Alt(JitWriter *jit)
//xor edx, <cellsize - val> //xor edx, <cellsize - val>
cell_t val = sizeof(cell_t) - jit->read_cell(); cell_t val = sizeof(cell_t) - jit->read_cell();
if (val < SCHAR_MAX && val > SCHAR_MIN) if (val < SCHAR_MAX && val > SCHAR_MIN)
{
IA32_Xor_Rm_Imm8(jit, AMX_REG_ALT, MOD_REG, (jit_int8_t)val); IA32_Xor_Rm_Imm8(jit, AMX_REG_ALT, MOD_REG, (jit_int8_t)val);
else } else {
IA32_Xor_Rm_Imm32(jit, AMX_REG_ALT, MOD_REG, val); IA32_Xor_Rm_Imm32(jit, AMX_REG_ALT, MOD_REG, val);
}
} }
inline void WriteOp_Cmps(JitWriter *jit) inline void WriteOp_Cmps(JitWriter *jit)

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@ -1,6 +1,8 @@
#ifndef _INCLUDE_JIT_X86_MACROS_H #ifndef _INCLUDE_JIT_X86_MACROS_H
#define _INCLUDE_JIT_X86_MACROS_H #define _INCLUDE_JIT_X86_MACROS_H
#include <limits.h>
//MOD R/M //MOD R/M
#define MOD_MEM_REG 0 #define MOD_MEM_REG 0
#define MOD_DISP8 1 #define MOD_DISP8 1