I'm proud to present the first non-backpatched error checking routine!
all of this is untested --HG-- extra : convert_revision : svn%3A39bc706e-5318-0410-9160-8a85361fbb7c/trunk%4080
This commit is contained in:
David Anderson
parent
824beee935
commit
1577897925
@ -2,6 +2,7 @@
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#define _INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
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#include <sp_vm_types.h>
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#include <sp_vm_api.h>
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#if defined HAVE_STDINT_H && !defined WIN32
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#include <stdint.h>
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@ -70,6 +71,7 @@ public:
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cell_t *inptr; /* input pointer */
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jitcode_t outbase; /* output pointer */
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jitcode_t outptr; /* output base */
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SourcePawn::ICompilation *data; /* compiler live info */
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};
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#endif //_INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
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@ -1,7 +1,6 @@
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#include <string.h>
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#include <stdlib.h>
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#include "jit_x86.h"
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#include "..\jit_helpers.h"
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#include "opcode_helpers.h"
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#include "x86_macros.h"
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@ -1001,6 +1000,13 @@ inline void WriteOp_Const_S(JitWriter *jit)
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}
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}
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inline void WriteOp_Load_I(JitWriter *jit)
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{
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//mov eax, [edi+eax]
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Write_Check_VerifyAddr(jit, REG_EAX, false);
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IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
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}
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/*************************************************
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*************************************************
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@ -1074,7 +1080,6 @@ IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
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JitWriter writer;
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JitWriter *jit = &writer;
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cell_t *endptr = (cell_t *)(end_cip);
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jitoffs_t jit_return;
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/* Initial code is written "blank,"
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* so we can check the exact memory usage.
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@ -1085,16 +1090,17 @@ IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
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/* Get inlining level */
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int inline_level = data->inline_level;
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bool never_inline = false;
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if (inline_level == 0)
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{
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never_inline = true;
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}
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//:TODO: Jump back here once finished!
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/* Start writing the actual code */
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jit_return = Write_Execute_Function(jit, never_inline);
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data->jit_return = Write_Execute_Function(jit);
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/* Write error checking routines in case they are needed */
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data->jit_verify_addr_eax = jit->jit_curpos();
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Write_Check_VerifyAddr(jit, REG_EAX, true);
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data->jit_verify_addr_edx = jit->jit_curpos();
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Write_Check_VerifyAddr(jit, REG_EDX, true);
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for (; writer.inptr <= endptr;)
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{
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@ -1656,6 +1662,11 @@ IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
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WriteOp_Const_S(jit);
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break;
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}
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case OP_LOAD_I:
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{
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WriteOp_Load_I(jit);
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break;
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}
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default:
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{
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AbortCompilation(co);
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@ -3,17 +3,24 @@
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#include <sp_vm_types.h>
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#include <sp_vm_api.h>
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#include "..\jit_helpers.h"
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using namespace SourcePawn;
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#define JIT_INLINE_ERRORCHECKS (1<<0)
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#define JIT_INLINE_NATIVES (1<<1)
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class CompData : public ICompilation
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{
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public:
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CompData() : plugin(NULL), debug(false), inline_level(2)
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CompData() : plugin(NULL), debug(false), inline_level(3)
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{
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};
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public:
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sp_plugin_t *plugin;
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jitoffs_t jit_return;
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jitoffs_t jit_verify_addr_eax;
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jitoffs_t jit_verify_addr_edx;
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int inline_level;
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bool debug;
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};
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@ -44,5 +51,6 @@ public:
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#define AMX_INFO_HEAP 4
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#define AMX_INFO_RETVAL 8
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#define AMX_INFO_CONTEXT 12
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#define AMX_INFO_STACKTOP 16
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#endif //_INCLUDE_SOURCEPAWN_JIT_X86_H_
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@ -9,19 +9,6 @@ int OpAdvTable[OP_NUM_OPCODES];
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jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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{
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/**
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* The state expected by our plugin is:
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* #define AMX_REG_PRI REG_EAX (done)
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#define AMX_REG_ALT REG_EDX (done)
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#define AMX_REG_STK REG_EBP (done)
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#define AMX_REG_DAT REG_EDI (done)
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#define AMX_REG_TMP REG_ECX (nothing)
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#define AMX_REG_INFO REG_ESI (done)
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#define AMX_REG_FRM REG_EBX (done)
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#define AMX_INFO_FRM AMX_REG_INFO (done)
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#define AMX_INFO_HEAP 4 (done)
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#define AMX_INFO_RETVAL 8 (done)
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#define AMX_INFO_CONTEXT 12 (done)
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*
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* The variables we're passed in:
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* sp_context_t *ctx, uint32_t code_idx, cell_t *result
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*/
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@ -45,7 +32,7 @@ jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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IA32_Push_Reg(jit, REG_EDI);
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IA32_Push_Reg(jit, REG_EBX);
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//sub esp, 4*4 - allocate info array
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//sub esp, 4*5 - allocate info array
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//mov esi, esp - save info pointer
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IA32_Sub_Rm_Imm8(jit, REG_ESP, 4*4, MOD_REG);
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IA32_Mov_Reg_Rm(jit, AMX_REG_INFO, REG_ESP, MOD_REG);
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@ -69,13 +56,21 @@ jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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//mov ebp, [eax+<offs>] - get stack pointer
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//add ebp, edi - relocate to data section
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//mov ebx, ebp - copy sp to frm
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_STK, REG_EAX, offsetof(sp_context_t, sp));
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IA32_Add_Rm_Reg(jit, REG_EBP, AMX_REG_STK, AMX_REG_DAT);
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IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_REG);
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//mov ecx, edi - copy base of data to temp var
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//add ecx, [eax+<offs>] - add memsize to get stack top
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//mov [esi+16], ecx - store stack top into info pointer
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IA32_Mov_Reg_Rm(jit, REG_ECX, AMX_REG_DAT, MOD_REG);
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IA32_Add_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, memory));
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_ECX, AMX_INFO_STACKTOP);
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//mov ecx, [ebp+12] - get code index
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//add ecx, [eax+<offs>] - add code base to index
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//mov edx, [eax+<offs>] - get alt
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//mov eax, [eax+<offs>] - get pri
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_STK, REG_EAX, offsetof(sp_context_t, sp));
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IA32_Add_Rm_Reg(jit, REG_EBP, AMX_REG_STK, AMX_REG_DAT);
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IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_REG);
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IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, REG_EBP, 12);
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IA32_Add_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, base));
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, REG_EAX, offsetof(sp_context_t, alt));
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@ -94,9 +89,10 @@ jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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IA32_Mov_Rm_Reg(jit, REG_EBP, AMX_REG_PRI, MOD_MEM_REG);
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IA32_Mov_Reg_Imm32(jit, REG_EAX, SP_ERR_NONE);
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/* where error checking/return functions should go to */
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/* save where error checking/halting functions should go to */
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jitoffs_t offs_return;
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if (never_inline)
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CompData *data = (CompData *)jit->data;
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if (!(data->inline_level & JIT_INLINE_ERRORCHECKS))
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{
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/* We have to write code assume we're breaking out of a call */
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//jmp [past the next instruction]
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@ -121,7 +117,7 @@ jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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//pop esi
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//pop ebp
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//ret
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IA32_Add_Rm_Imm8(jit, REG_ESP, 4*4, MOD_REG);
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IA32_Add_Rm_Imm8(jit, REG_ESP, 4*5, MOD_REG);
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IA32_Pop_Reg(jit, REG_EBX);
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IA32_Pop_Reg(jit, REG_EDI);
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IA32_Pop_Reg(jit, REG_ESI);
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@ -131,6 +127,75 @@ jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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return offs_return;
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}
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void Write_Error(JitWriter *jit, int error)
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{
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CompData *data = (CompData *)jit->data;
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/* These are so small that we always inline them! */
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//mov eax, <error>
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//jmp [...jit_return]
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IA32_Mov_Reg_Imm32(jit, REG_EAX, error);
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jitoffs_t jmp = IA32_Jump_Imm32(jit, 0);
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IA32_Write_Jump32(jit, jmp, data->jit_return);
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}
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void Write_Check_VerifyAddr(JitWriter *jit, jit_uint8_t reg, bool firstcall)
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{
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CompData *data = (CompData *)jit->data;
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/* :TODO: Should this be checking for below heaplow?
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* The old JIT did not.
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*/
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bool call = false;
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if (!(data->inline_level & JIT_INLINE_ERRORCHECKS))
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{
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/* If we're not in the initial generation phase,
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* Write a call to the actual routine instead.
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*/
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if (!firstcall)
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{
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jitoffs_t call = IA32_Call_Imm32(jit, 0);
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if (reg == REG_EAX)
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{
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IA32_Write_Jump32(jit, call, data->jit_verify_addr_eax);
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} else if (reg == REG_EDX) {
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IA32_Write_Jump32(jit, call, data->jit_verify_addr_edx);
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}
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return;
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}
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call = true;
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} else if (firstcall) {
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/* Inline + initial gen == no code */
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return;
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}
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//cmp reg, [stp]
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//jae memaccess
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//cmp reg, [hea]
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//jb continue
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//lea ecx, [reg+edi]
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//cmp ecx, ebp
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//jae continue
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//memaccess: (write error)
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//continue:
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IA32_Cmp_Reg_Rm_Disp8(jit, reg, AMX_REG_INFO, AMX_INFO_STACKTOP);
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jitoffs_t jmp1 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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IA32_Cmp_Reg_Rm_Disp8(jit, reg, AMX_REG_INFO, AMX_INFO_HEAP);
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jitoffs_t jmp2 = IA32_Jump_Cond_Imm8(jit, CC_B, 0);
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IA32_Lea_DispRegReg(jit, REG_ECX, reg, REG_EDI);
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IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
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jitoffs_t jmp3 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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IA32_Send_Jump8_Here(jit, jmp1);
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Write_Error(jit, SP_ERR_MEMACCESS);
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IA32_Send_Jump8_Here(jit, jmp2);
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IA32_Send_Jump8_Here(jit, jmp3);
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if (call)
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{
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IA32_Return(jit);
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}
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}
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void Macro_PushN_Addr(JitWriter *jit, int i)
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{
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//push eax
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@ -7,11 +7,20 @@
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* This outputs the execution function for a plugin.
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* It also returns the 'return' offset, which is used for
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* breaking out of the JIT during runtime.
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*
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* If 'never_inline' is true, it outputs slightly different code used for
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* inlining the error checking routines.
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*/
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jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline);
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jitoffs_t Write_Execute_Function(JitWriter *jit);
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/**
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* Generates code to set an error state in the VM and return.
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* Note that this should only be called from inside an error
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* checking function.
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*/
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void Write_Error(JitWriter *jit, int error);
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/**
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* Verifies an address by register.
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*/
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void Write_Check_VerifyAddr(JitWriter *jit, jit_uint8_t reg, bool firstcall);
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/**
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* These are for writing the PushN opcodes.
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@ -32,7 +41,7 @@ typedef enum
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OP_LREF_ALT, //DONE
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OP_LREF_S_PRI, //DONE
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OP_LREF_S_ALT, //DONE
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OP_LOAD_I,
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OP_LOAD_I, //DONE
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OP_LODB_I,
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OP_CONST_PRI, //DONE
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OP_CONST_ALT, //DONE
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@ -97,6 +97,7 @@
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#define IA32_SHL_RM_CL 0xD3 // encoding is /4
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#define IA32_SAR_RM_IMM8 0xC1 // encoding is /7 <ib>
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#define IA32_CMP_RM_REG 0x39 // encoding is /r
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#define IA32_CMP_REG_RM 0x3B // encoding is /r
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#define IA32_SETCC_RM8_1 0x0F // opcode part 1
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#define IA32_SETCC_RM8_2 0x90 // encoding is +cc /0 (8bits)
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#define IA32_XCHG_EAX_REG 0x90 // encoding is +r
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@ -498,8 +499,16 @@ inline void IA32_Lea_Reg_DispRegMultImm8(JitWriter *jit,
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jit->write_byte(val);
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}
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inline void IA32_Lea_DispRegReg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_uint8_t dispreg)
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{
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jit->write_ubyte(IA32_LEA_REG_MEM);
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jit->write_ubyte(ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
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jit->write_ubyte(ia32_sib(NOSCALE, dispreg, src_base));
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}
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inline void IA32_Lea_DispRegImm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int8_t val)
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{
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/* :TODO: - why does this take in src_base? */
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jit->write_ubyte(IA32_LEA_REG_MEM);
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jit->write_ubyte(ia32_modrm(MOD_DISP8, dest, MOD_MEM_REG));
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jit->write_byte(val);
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@ -507,6 +516,7 @@ inline void IA32_Lea_DispRegImm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t s
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inline void IA32_Lea_DispRegImm32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int32_t val)
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{
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/* :TODO: - why does this take in src_base? */
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jit->write_ubyte(IA32_LEA_REG_MEM);
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jit->write_ubyte(ia32_modrm(MOD_DISP32, dest, MOD_MEM_REG));
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jit->write_int32(val);
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@ -709,12 +719,31 @@ inline void IA32_Write_Jump8(JitWriter *jit, jitoffs_t jmp, jitoffs_t target)
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jit->outptr = oldptr;
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}
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inline void IA32_Write_Jump32(JitWriter *jit, jitoffs_t jmp, jitoffs_t target)
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{
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//save old ptr
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jitcode_t oldptr = jit->outptr;
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//get relative difference
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jit_int32_t diff = (target - (jmp + 1));
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//overwrite old value
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jit->outptr = jit->outbase + jmp;
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jit->write_int32(diff);
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//restore old ptr
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jit->outptr = oldptr;
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}
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inline void IA32_Send_Jump8_Here(JitWriter *jit, jitoffs_t jmp)
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{
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jitoffs_t curptr = jit->jit_curpos();
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IA32_Write_Jump8(jit, jmp, curptr);
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}
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inline void IA32_Send_Jump32_Here(JitWriter *jit, jitoffs_t jmp)
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{
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jitoffs_t curptr = jit->jit_curpos();
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IA32_Write_Jump32(jit, jmp, curptr);
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}
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inline void IA32_Return(JitWriter *jit)
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{
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jit->write_ubyte(IA32_RET);
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@ -732,6 +761,13 @@ inline void IA32_Cmp_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, j
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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}
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inline void IA32_Cmp_Reg_Rm_Disp8(JitWriter *jit, jit_uint8_t reg1, jit_uint8_t reg2, jit_int8_t disp8)
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{
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jit->write_ubyte(IA32_CMP_REG_RM);
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jit->write_ubyte(ia32_modrm(MOD_DISP8, reg1, reg2));
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jit->write_byte(disp8);
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}
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inline void IA32_Cmp_Rm_Imm8(JitWriter *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int8_t imm8)
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{
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jit->write_ubyte(IA32_CMP_RM_IMM8);
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