Wrote the JIT execution function
Solidified some more code --HG-- extra : convert_revision : svn%3A39bc706e-5318-0410-9160-8a85361fbb7c/trunk%4079
This commit is contained in:
David Anderson
parent
3cdf54e7e9
commit
824beee935
@ -830,7 +830,6 @@ inline void WriteOp_Pop_Pri(JitWriter *jit)
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//add ebp, 4
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IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG);
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IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
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}
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inline void WriteOp_Pop_Alt(JitWriter *jit)
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@ -1049,16 +1048,6 @@ IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
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} else if (op_c == -1) {
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switch (op)
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{
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case OP_SYSREQ_C:
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case OP_SYSREQ_PRI:
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case OP_SYSREQ_N:
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{
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if (!data->always_inline)
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{
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reloc_count++;
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}
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break;
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}
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case OP_CASETBL:
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{
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ucell_t num = *(ucell_t *)cip;
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@ -1083,14 +1072,30 @@ IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
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*********************************************/
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JitWriter writer;
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JitWriter *jit = &writer;
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cell_t *endptr = (cell_t *)(end_cip);
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jitoffs_t jit_return;
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/* Initial code is written "blank,"
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* so we can check the exact memory usage.
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*/
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writer.inptr = (cell_t *)code;
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writer.outptr = NULL;
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writer.outbase = NULL;
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//redo_pass:
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cell_t *endptr = (cell_t *)(end_cip);
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JitWriter *jit = &writer;
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/* Get inlining level */
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int inline_level = data->inline_level;
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bool never_inline = false;
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if (inline_level == 0)
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{
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never_inline = true;
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}
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//:TODO: Jump back here once finished!
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/* Start writing the actual code */
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jit_return = Write_Execute_Function(jit, never_inline);
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for (; writer.inptr <= endptr;)
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{
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op = (OPCODE)writer.read_cell();
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@ -9,12 +9,12 @@ using namespace SourcePawn;
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class CompData : public ICompilation
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{
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public:
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CompData() : plugin(NULL), debug(false), always_inline(true)
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CompData() : plugin(NULL), debug(false), inline_level(2)
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{
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};
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public:
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sp_plugin_t *plugin;
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bool always_inline;
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int inline_level;
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bool debug;
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};
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@ -43,5 +43,6 @@ public:
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#define AMX_INFO_FRM AMX_REG_INFO
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#define AMX_INFO_HEAP 4
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#define AMX_INFO_RETVAL 8
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#define AMX_INFO_CONTEXT 12
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#endif //_INCLUDE_SOURCEPAWN_JIT_X86_H_
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@ -6,26 +6,129 @@
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int OpAdvTable[OP_NUM_OPCODES];
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void Write_Prologue(JitWriter *jit)
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jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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{
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/**
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* The state expected by our plugin is:
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* #define AMX_REG_PRI REG_EAX
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#define AMX_REG_ALT REG_EDX
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#define AMX_REG_STK REG_EBP
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#define AMX_REG_DAT REG_EDI
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#define AMX_REG_TMP REG_ECX
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#define AMX_REG_INFO REG_ESI
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#define AMX_REG_FRM REG_EBX
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#define AMX_INFO_FRM AMX_REG_INFO
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#define AMX_INFO_HEAP 4
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#define AMX_INFO_RETVAL 12
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* #define AMX_REG_PRI REG_EAX (done)
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#define AMX_REG_ALT REG_EDX (done)
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#define AMX_REG_STK REG_EBP (done)
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#define AMX_REG_DAT REG_EDI (done)
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#define AMX_REG_TMP REG_ECX (nothing)
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#define AMX_REG_INFO REG_ESI (done)
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#define AMX_REG_FRM REG_EBX (done)
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#define AMX_INFO_FRM AMX_REG_INFO (done)
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#define AMX_INFO_HEAP 4 (done)
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#define AMX_INFO_RETVAL 8 (done)
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#define AMX_INFO_CONTEXT 12 (done)
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*
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* The variables we're passed in:
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* sp_context_t *ctx, uint32_t code_idx, cell_t *result
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*/
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/**
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* !NOTE!
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* Currently, we do not accept ctx->frm as the new frame pointer.
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* Instead, we copy the frame from the stack pointer.
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* This is because we do not support resuming or sleeping!
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*/
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//push ebp
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//mov ebp, esp
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IA32_Push_Reg(jit, REG_EBP);
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IA32_Mov_Reg_Rm(jit, REG_EBP, REG_ESP, MOD_REG);
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//push esi
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//push edi
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//push ebx
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IA32_Push_Reg(jit, REG_ESI);
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IA32_Push_Reg(jit, REG_EDI);
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IA32_Push_Reg(jit, REG_EBX);
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//sub esp, 4*4 - allocate info array
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//mov esi, esp - save info pointer
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IA32_Sub_Rm_Imm8(jit, REG_ESP, 4*4, MOD_REG);
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IA32_Mov_Reg_Rm(jit, AMX_REG_INFO, REG_ESP, MOD_REG);
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//mov eax, [ebp+16] - get result pointer
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//mov [esi+8], eax - store into info pointer
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IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, REG_EBP, 16);
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_EAX, AMX_INFO_RETVAL);
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//mov eax, [ebp+8] - get context
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//mov [esi+12], eax - store context into info pointer
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//mov ecx, [eax+<offs>] - get heap pointer
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//mov [esi+4], ecx - store heap into info pointer
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//mov edi, [eax+<offs>] - get data pointer
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IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, REG_EBP, 8);
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_EAX, AMX_INFO_CONTEXT);
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IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, hp));
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_ECX, AMX_INFO_HEAP);
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_DAT, REG_EAX, offsetof(sp_context_t, data));
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//mov ebp, [eax+<offs>] - get stack pointer
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//add ebp, edi - relocate to data section
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//mov ebx, ebp - copy sp to frm
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//mov ecx, [ebp+12] - get code index
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//add ecx, [eax+<offs>] - add code base to index
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//mov edx, [eax+<offs>] - get alt
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//mov eax, [eax+<offs>] - get pri
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_STK, REG_EAX, offsetof(sp_context_t, sp));
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IA32_Add_Rm_Reg(jit, REG_EBP, AMX_REG_STK, AMX_REG_DAT);
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IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_REG);
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IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, REG_EBP, 12);
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IA32_Add_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, base));
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, REG_EAX, offsetof(sp_context_t, alt));
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, REG_EAX, offsetof(sp_context_t, pri));
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/* by now, everything is set up, so we can call into the plugin */
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//call ecx
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IA32_Call_Rm(jit, REG_ECX);
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/* if the code flow gets to here, there was a normal return */
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//mov ebp, [esi+8] - get retval pointer
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//mov [ebp], eax - store retval from PRI
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//mov eax, SP_ERR_NONE - set no error
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IA32_Mov_Reg_Rm_Disp8(jit, REG_EBP, AMX_REG_INFO, AMX_INFO_RETVAL);
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IA32_Mov_Rm_Reg(jit, REG_EBP, AMX_REG_PRI, MOD_MEM_REG);
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IA32_Mov_Reg_Imm32(jit, REG_EAX, SP_ERR_NONE);
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/* where error checking/return functions should go to */
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jitoffs_t offs_return;
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if (never_inline)
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{
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/* We have to write code assume we're breaking out of a call */
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//jmp [past the next instruction]
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//add esp, 4
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jitoffs_t offs = IA32_Jump_Imm8(jit, 0);
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offs_return = jit->jit_curpos();
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IA32_Sub_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
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IA32_Send_Jump8_Here(jit, offs);
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} else {
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offs_return = jit->jit_curpos();
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}
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/* _FOR NOW_ ...
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* We are _not_ going to restore anything that was on the stack.
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* This is a tiny, useless optimization based on the fact that
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* BaseContext::Execute() automatically restores our values anyway.
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*/
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//add esp, 4*4
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//pop ebx
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//pop edi
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//pop esi
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//pop ebp
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//ret
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IA32_Add_Rm_Imm8(jit, REG_ESP, 4*4, MOD_REG);
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IA32_Pop_Reg(jit, REG_EBX);
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IA32_Pop_Reg(jit, REG_EDI);
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IA32_Pop_Reg(jit, REG_ESI);
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IA32_Pop_Reg(jit, REG_EBP);
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IA32_Return(jit);
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return offs_return;
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}
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void Macro_PushN_Addr(JitWriter *jit, int i)
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@ -142,6 +245,7 @@ JITX86::JITX86()
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OpAdvTable[OP_LOAD_S_BOTH] = sizeof(cell_t)*2;
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OpAdvTable[OP_CONST] = sizeof(cell_t)*2;
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OpAdvTable[OP_CONST_S] = sizeof(cell_t)*2;
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OpAdvTable[OP_SYSREQ_N] = sizeof(cell_t)*2;
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/* instructions with 1 parameter */
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OpAdvTable[OP_LOAD_PRI] = sizeof(cell_t);
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@ -199,6 +303,7 @@ JITX86::JITX86()
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OpAdvTable[OP_BOUNDS] = sizeof(cell_t);
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OpAdvTable[OP_PUSH_ADR] = sizeof(cell_t);
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OpAdvTable[OP_PUSH_HEAP_C] = sizeof(cell_t);
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OpAdvTable[OP_SYSREQ_C] = sizeof(cell_t);
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/* instructions with 0 parameters */
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OpAdvTable[OP_LOAD_I] = 0;
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@ -261,6 +366,7 @@ JITX86::JITX86()
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OpAdvTable[OP_BREAK] = 0;
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OpAdvTable[OP_HEAP_PRI] = 0;
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OpAdvTable[OP_POP_HEAP_PRI] = 0;
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OpAdvTable[OP_SYSREQ_PRI] = 0;
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/* opcodes that need relocation */
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OpAdvTable[OP_CALL] = -2;
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@ -3,6 +3,19 @@
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#include "..\jit_helpers.h"
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/**
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* This outputs the execution function for a plugin.
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* It also returns the 'return' offset, which is used for
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* breaking out of the JIT during runtime.
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*
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* If 'never_inline' is true, it outputs slightly different code used for
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* inlining the error checking routines.
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*/
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jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline);
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/**
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* These are for writing the PushN opcodes.
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*/
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void Macro_PushN_Addr(JitWriter *jit, int i);
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void Macro_PushN_S(JitWriter *jit, int i);
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void Macro_PushN_C(JitWriter *jit, int i);
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@ -53,6 +53,7 @@
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#define IA32_XOR_RM_IMM32 0x81 // encoding is /6
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#define IA32_XOR_RM_IMM8 0x83 // encoding is /6
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#define IA32_ADD_RM_REG 0x01 // encoding is /r
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#define IA32_ADD_REG_RM 0x03 // encoding is /r
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#define IA32_ADD_RM_IMM32 0x81 // encoding is /0
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#define IA32_ADD_RM_IMM8 0x83 // encoding is /0
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#define IA32_ADD_EAX_IMM32 0x05 // no extra encoding
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@ -60,7 +61,9 @@
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#define IA32_SUB_RM_IMM8 0x83 // encoding is /5 <imm8>
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#define IA32_SUB_RM_IMM32 0x81 // encoding is /5 <imm32>
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#define IA32_JMP_IMM32 0xE9 // encoding is imm32
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#define IA32_JMP_IMM8 0xEB // encoding is imm8
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#define IA32_CALL_IMM32 0xE8 // relative call, <imm32>
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#define IA32_CALL_RM 0xFF // encoding is /2
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#define IA32_MOV_REG_IMM 0xB8 // encoding is +r <imm32>
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#define IA32_MOV_RM_REG 0x89 // encoding is /r
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#define IA32_MOV_REG_MEM 0x8B // encoding is /r
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@ -385,6 +388,13 @@ inline void IA32_Add_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t
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jit->write_byte(disp);
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}
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inline void IA32_Add_Reg_Rm_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
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{
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jit->write_ubyte(IA32_ADD_REG_RM);
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jit->write_ubyte(ia32_modrm(MOD_DISP8, dest, src));
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jit->write_byte(disp);
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}
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inline void IA32_Add_Rm_Imm8_Disp8(JitWriter *jit,
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jit_uint8_t dest,
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jit_int8_t val,
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@ -652,6 +662,15 @@ inline jitoffs_t IA32_Jump_Imm32(JitWriter *jit, jit_int32_t disp)
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return ptr;
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}
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inline jitoffs_t IA32_Jump_Imm8(JitWriter *jit, jit_int8_t disp)
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{
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jitoffs_t ptr;
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jit->write_ubyte(IA32_JMP_IMM8);
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ptr = jit->jit_curpos();
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jit->write_byte(disp);
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return ptr;
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}
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inline jitoffs_t IA32_Jump_Cond_Imm32(JitWriter *jit, jit_uint8_t cond, jit_int32_t disp)
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{
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jitoffs_t ptr;
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@ -671,6 +690,12 @@ inline jitoffs_t IA32_Call_Imm32(JitWriter *jit, jit_int32_t disp)
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return ptr;
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}
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inline void IA32_Call_Rm(JitWriter *jit, jit_uint8_t reg)
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{
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jit->write_ubyte(IA32_CALL_RM);
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jit->write_ubyte(ia32_modrm(MOD_REG, 2, reg));
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}
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inline void IA32_Write_Jump8(JitWriter *jit, jitoffs_t jmp, jitoffs_t target)
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{
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//save old ptr
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@ -189,10 +189,6 @@
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Filter="h;hpp;hxx;hm;inl;inc;xsd"
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UniqueIdentifier="{93995380-89BD-4b04-88EB-625FBE52EBFB}"
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>
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<File
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RelativePath="..\sp_vm_base.h"
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>
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</File>
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<File
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RelativePath="..\sp_vm_basecontext.h"
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>
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@ -319,6 +315,10 @@
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RelativePath="..\..\include\sp_vm_api.h"
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>
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</File>
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<File
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RelativePath="..\..\include\sp_vm_base.h"
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>
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</File>
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<File
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RelativePath="..\..\include\sp_vm_context.h"
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>
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@ -58,7 +58,18 @@ int BaseContext::Execute(uint32_t public_func, cell_t *result)
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return err;
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}
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return vm->ContextExecute(ctx, pubfunc->offs, result);
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PushCell(ctx->pushcount);
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ctx->pushcount = 0;
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cell_t save_sp = ctx->sp;
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cell_t save_hp = ctx->hp;
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err = vm->ContextExecute(ctx, pubfunc->offs, result);
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ctx->sp = save_sp;
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ctx->hp = save_hp;
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return err;
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}
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int BaseContext::HeapAlloc(unsigned int cells, cell_t *local_addr, cell_t **phys_addr)
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