487 lines
15 KiB
C++
487 lines
15 KiB
C++
#include <limits.h>
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#include <string.h>
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#include "jit_x86.h"
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#include "opcode_helpers.h"
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#include "x86_macros.h"
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int OpAdvTable[OP_NUM_OPCODES];
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jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
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{
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/**
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* The variables we're passed in:
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* sp_context_t *ctx, uint32_t code_idx, cell_t *result
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*/
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/**
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* !NOTE!
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* Currently, we do not accept ctx->frm as the new frame pointer.
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* Instead, we copy the frame from the stack pointer.
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* This is because we do not support resuming or sleeping!
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*/
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//push ebp
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//mov ebp, esp
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IA32_Push_Reg(jit, REG_EBP);
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IA32_Mov_Reg_Rm(jit, REG_EBP, REG_ESP, MOD_REG);
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//push esi
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//push edi
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//push ebx
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IA32_Push_Reg(jit, REG_ESI);
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IA32_Push_Reg(jit, REG_EDI);
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IA32_Push_Reg(jit, REG_EBX);
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//sub esp, 4*5 - allocate info array
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//mov esi, esp - save info pointer
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IA32_Sub_Rm_Imm8(jit, REG_ESP, 4*4, MOD_REG);
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IA32_Mov_Reg_Rm(jit, AMX_REG_INFO, REG_ESP, MOD_REG);
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//mov eax, [ebp+16] - get result pointer
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//mov [esi+8], eax - store into info pointer
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IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, REG_EBP, 16);
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_EAX, AMX_INFO_RETVAL);
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//mov eax, [ebp+8] - get context
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//mov [esi+12], eax - store context into info pointer
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//mov ecx, [eax+<offs>] - get heap pointer
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//mov [esi+4], ecx - store heap into info pointer
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//mov edi, [eax+<offs>] - get data pointer
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IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, REG_EBP, 8);
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_EAX, AMX_INFO_CONTEXT);
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IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, hp));
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_ECX, AMX_INFO_HEAP);
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_DAT, REG_EAX, offsetof(sp_context_t, data));
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//mov ebp, [eax+<offs>] - get stack pointer
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//add ebp, edi - relocate to data section
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//mov ebx, ebp - copy sp to frm
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_STK, REG_EAX, offsetof(sp_context_t, sp));
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IA32_Add_Rm_Reg(jit, REG_EBP, AMX_REG_STK, AMX_REG_DAT);
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IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_REG);
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//mov ecx, edi - copy base of data to temp var
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//add ecx, [eax+<offs>] - add memsize to get stack top
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//mov [esi+16], ecx - store stack top into info pointer
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IA32_Mov_Reg_Rm(jit, REG_ECX, AMX_REG_DAT, MOD_REG);
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IA32_Add_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, memory));
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IA32_Mov_Rm_Reg_Disp8(jit, REG_ESI, REG_ECX, AMX_INFO_STACKTOP);
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//mov ecx, [ebp+12] - get code index
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//add ecx, [eax+<offs>] - add code base to index
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//mov edx, [eax+<offs>] - get alt
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//mov eax, [eax+<offs>] - get pri
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IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, REG_EBP, 12);
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IA32_Add_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, base));
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, REG_EAX, offsetof(sp_context_t, alt));
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, REG_EAX, offsetof(sp_context_t, pri));
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/* by now, everything is set up, so we can call into the plugin */
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//call ecx
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IA32_Call_Rm(jit, REG_ECX);
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/* if the code flow gets to here, there was a normal return */
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//mov ebp, [esi+8] - get retval pointer
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//mov [ebp], eax - store retval from PRI
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//mov eax, SP_ERR_NONE - set no error
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IA32_Mov_Reg_Rm_Disp8(jit, REG_EBP, AMX_REG_INFO, AMX_INFO_RETVAL);
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IA32_Mov_Rm_Reg(jit, REG_EBP, AMX_REG_PRI, MOD_MEM_REG);
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IA32_Mov_Reg_Imm32(jit, REG_EAX, SP_ERR_NONE);
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/* save where error checking/halting functions should go to */
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jitoffs_t offs_return;
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CompData *data = (CompData *)jit->data;
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if (!(data->inline_level & JIT_INLINE_ERRORCHECKS))
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{
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/* We have to write code assume we're breaking out of a call */
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//jmp [past the next instruction]
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//add esp, 4
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jitoffs_t offs = IA32_Jump_Imm8(jit, 0);
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offs_return = jit->jit_curpos();
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IA32_Sub_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
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IA32_Send_Jump8_Here(jit, offs);
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} else {
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offs_return = jit->jit_curpos();
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}
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/* _FOR NOW_ ...
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* We are _not_ going to restore anything that was on the stack.
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* This is a tiny, useless optimization based on the fact that
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* BaseContext::Execute() automatically restores our values anyway.
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*/
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//add esp, 4*4
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//pop ebx
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//pop edi
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//pop esi
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//pop ebp
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//ret
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IA32_Add_Rm_Imm8(jit, REG_ESP, 4*5, MOD_REG);
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IA32_Pop_Reg(jit, REG_EBX);
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IA32_Pop_Reg(jit, REG_EDI);
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IA32_Pop_Reg(jit, REG_ESI);
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IA32_Pop_Reg(jit, REG_EBP);
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IA32_Return(jit);
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return offs_return;
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}
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void Write_Error(JitWriter *jit, int error)
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{
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CompData *data = (CompData *)jit->data;
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/* These are so small that we always inline them! */
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//mov eax, <error>
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//jmp [...jit_return]
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IA32_Mov_Reg_Imm32(jit, REG_EAX, error);
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jitoffs_t jmp = IA32_Jump_Imm32(jit, 0);
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IA32_Write_Jump32(jit, jmp, data->jit_return);
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}
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void Write_Check_VerifyAddr(JitWriter *jit, jit_uint8_t reg, bool firstcall)
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{
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CompData *data = (CompData *)jit->data;
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/* :TODO: Should this be checking for below heaplow?
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* The old JIT did not.
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*/
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if (!data->checks)
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{
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return;
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}
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bool call = false;
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if (!(data->inline_level & JIT_INLINE_ERRORCHECKS))
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{
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/* If we're not in the initial generation phase,
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* Write a call to the actual routine instead.
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*/
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if (!firstcall)
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{
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jitoffs_t call = IA32_Call_Imm32(jit, 0);
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if (reg == REG_EAX)
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{
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IA32_Write_Jump32(jit, call, data->jit_verify_addr_eax);
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} else if (reg == REG_EDX) {
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IA32_Write_Jump32(jit, call, data->jit_verify_addr_edx);
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}
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return;
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}
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call = true;
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} else if (firstcall) {
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/* Inline + initial gen == no code */
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return;
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}
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//cmp reg, [stp]
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//jae memaccess
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//cmp reg, [hea]
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//jb continue
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//lea ecx, [reg+edi]
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//cmp ecx, ebp
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//jae continue
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//memaccess: (write error)
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//continue:
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IA32_Cmp_Reg_Rm_Disp8(jit, reg, AMX_REG_INFO, AMX_INFO_STACKTOP);
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jitoffs_t jmp1 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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IA32_Cmp_Reg_Rm_Disp8(jit, reg, AMX_REG_INFO, AMX_INFO_HEAP);
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jitoffs_t jmp2 = IA32_Jump_Cond_Imm8(jit, CC_B, 0);
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IA32_Lea_DispRegReg(jit, REG_ECX, reg, REG_EDI);
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IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
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jitoffs_t jmp3 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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IA32_Send_Jump8_Here(jit, jmp1);
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Write_Error(jit, SP_ERR_MEMACCESS);
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IA32_Send_Jump8_Here(jit, jmp2);
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IA32_Send_Jump8_Here(jit, jmp3);
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if (call)
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{
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IA32_Return(jit);
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}
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}
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void Write_CheckMargin_Stack(JitWriter *jit)
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{
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/* this is small, so we always inline it.
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*/
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//cmp ebp, [esi+stp]
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//jle :continue
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IA32_Cmp_Reg_Rm_Disp8(jit, AMX_REG_STK, AMX_REG_INFO, AMX_INFO_STACKTOP);
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jitoffs_t jmp = IA32_Jump_Cond_Imm8(jit, CC_LE, 0);
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if (!(((CompData *)jit->data)->inline_level & JIT_INLINE_ERRORCHECKS))
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{
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//sub esp, 4 - correct stack for returning to non-inlined JIT
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IA32_Sub_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
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}
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Write_Error(jit, SP_ERR_STACKMIN);
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//continue:
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IA32_Send_Jump8_Here(jit, jmp);
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}
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void Macro_PushN_Addr(JitWriter *jit, int i)
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{
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//push eax
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//mov eax, frm
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//loop i times:
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// lea ecx, [eax+<val>]
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// mov [ebp-4*i], ecx
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//sub ebp, 4*N
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//pop eax
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cell_t val;
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int n = 1;
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IA32_Push_Reg(jit, AMX_REG_PRI);
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IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_INFO_FRM, MOD_MEM_REG);
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do
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{
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val = jit->read_cell();
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if (val < SCHAR_MAX && val > SCHAR_MIN)
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IA32_Lea_DispRegImm8(jit, AMX_REG_TMP, AMX_REG_PRI, (jit_int8_t)val);
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else
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IA32_Lea_DispRegImm32(jit, AMX_REG_TMP, AMX_REG_PRI, val);
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IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n);
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} while (n++ < i);
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IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG);
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IA32_Pop_Reg(jit, AMX_REG_PRI);
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}
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void Macro_PushN_S(JitWriter *jit, int i)
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{
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//loop i times:
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// mov ecx, [ebx+<val>]
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// mov [ebp-4*i], ecx
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//sub ebp, 4*N
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cell_t val;
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int n = 1;
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do
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{
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val = jit->read_cell();
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if (val < SCHAR_MAX && val > SCHAR_MIN)
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val);
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else
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IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val);
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IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n);
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} while (n++ < i);
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IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG);
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}
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void Macro_PushN_C(JitWriter *jit, int i)
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{
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//loop i times:
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// mov [ebp-4*i], <val>
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//sub ebp, 4*N
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int n = 1;
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do
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{
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IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_STK, jit->read_cell(), -4*n);
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} while (n++ < i);
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IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG);
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}
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void Macro_PushN(JitWriter *jit, int i)
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{
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//loop i times:
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// mov ecx, [edi+<val>]
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// mov [ebp-4*i], ecx
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//sub ebp, 4*N
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cell_t val;
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int n = 1;
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do
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{
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val = jit->read_cell();
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if (val < SCHAR_MAX && val > SCHAR_MIN)
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val);
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else
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IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val);
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IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n);
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} while (n++ < i);
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IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG);
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}
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JITX86::JITX86()
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{
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memset(OpAdvTable, -1, sizeof(OpAdvTable));
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/* instructions with 5 parameters */
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OpAdvTable[OP_PUSH5_C] = sizeof(cell_t)*5;
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OpAdvTable[OP_PUSH5] = sizeof(cell_t)*5;
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OpAdvTable[OP_PUSH5_S] = sizeof(cell_t)*5;
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OpAdvTable[OP_PUSH5_ADR] = sizeof(cell_t)*5;
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/* instructions with 4 parameters */
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OpAdvTable[OP_PUSH4_C] = sizeof(cell_t)*4;
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OpAdvTable[OP_PUSH4] = sizeof(cell_t)*4;
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OpAdvTable[OP_PUSH4_S] = sizeof(cell_t)*4;
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OpAdvTable[OP_PUSH4_ADR] = sizeof(cell_t)*4;
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/* instructions with 3 parameters */
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OpAdvTable[OP_PUSH3_C] = sizeof(cell_t)*3;
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OpAdvTable[OP_PUSH3] = sizeof(cell_t)*3;
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OpAdvTable[OP_PUSH3_S] = sizeof(cell_t)*3;
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OpAdvTable[OP_PUSH3_ADR] = sizeof(cell_t)*3;
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/* instructions with 2 parameters */
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OpAdvTable[OP_PUSH2_C] = sizeof(cell_t)*2;
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OpAdvTable[OP_PUSH2] = sizeof(cell_t)*2;
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OpAdvTable[OP_PUSH2_S] = sizeof(cell_t)*2;
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OpAdvTable[OP_PUSH2_ADR] = sizeof(cell_t)*2;
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OpAdvTable[OP_LOAD_BOTH] = sizeof(cell_t)*2;
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OpAdvTable[OP_LOAD_S_BOTH] = sizeof(cell_t)*2;
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OpAdvTable[OP_CONST] = sizeof(cell_t)*2;
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OpAdvTable[OP_CONST_S] = sizeof(cell_t)*2;
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OpAdvTable[OP_SYSREQ_N] = sizeof(cell_t)*2;
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/* instructions with 1 parameter */
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OpAdvTable[OP_LOAD_PRI] = sizeof(cell_t);
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OpAdvTable[OP_LOAD_ALT] = sizeof(cell_t);
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OpAdvTable[OP_LOAD_S_PRI] = sizeof(cell_t);
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OpAdvTable[OP_LOAD_S_ALT] = sizeof(cell_t);
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OpAdvTable[OP_LREF_PRI] = sizeof(cell_t);
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OpAdvTable[OP_LREF_ALT] = sizeof(cell_t);
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OpAdvTable[OP_LREF_S_PRI] = sizeof(cell_t);
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OpAdvTable[OP_LREF_S_ALT] = sizeof(cell_t);
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OpAdvTable[OP_LODB_I] = sizeof(cell_t);
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OpAdvTable[OP_CONST_PRI] = sizeof(cell_t);
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OpAdvTable[OP_CONST_ALT] = sizeof(cell_t);
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OpAdvTable[OP_ADDR_PRI] = sizeof(cell_t);
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OpAdvTable[OP_ADDR_ALT] = sizeof(cell_t);
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OpAdvTable[OP_STOR_PRI] = sizeof(cell_t);
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OpAdvTable[OP_STOR_ALT] = sizeof(cell_t);
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OpAdvTable[OP_STOR_S_PRI] = sizeof(cell_t);
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OpAdvTable[OP_STOR_S_ALT] = sizeof(cell_t);
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OpAdvTable[OP_SREF_PRI] = sizeof(cell_t);
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OpAdvTable[OP_SREF_ALT] = sizeof(cell_t);
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OpAdvTable[OP_SREF_S_PRI] = sizeof(cell_t);
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OpAdvTable[OP_SREF_S_ALT] = sizeof(cell_t);
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OpAdvTable[OP_STRB_I] = sizeof(cell_t);
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OpAdvTable[OP_LIDX_B] = sizeof(cell_t);
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OpAdvTable[OP_IDXADDR_B] = sizeof(cell_t);
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OpAdvTable[OP_ALIGN_PRI] = sizeof(cell_t);
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OpAdvTable[OP_ALIGN_ALT] = sizeof(cell_t);
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OpAdvTable[OP_LCTRL] = sizeof(cell_t);
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OpAdvTable[OP_SCTRL] = sizeof(cell_t);
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OpAdvTable[OP_PUSH_C] = sizeof(cell_t);
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OpAdvTable[OP_PUSH] = sizeof(cell_t);
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OpAdvTable[OP_PUSH_S] = sizeof(cell_t);
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OpAdvTable[OP_STACK] = sizeof(cell_t);
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OpAdvTable[OP_HEAP] = sizeof(cell_t);
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OpAdvTable[OP_JREL] = sizeof(cell_t);
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OpAdvTable[OP_SHL_C_PRI] = sizeof(cell_t);
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OpAdvTable[OP_SHL_C_ALT] = sizeof(cell_t);
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OpAdvTable[OP_SHR_C_PRI] = sizeof(cell_t);
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OpAdvTable[OP_SHR_C_ALT] = sizeof(cell_t);
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OpAdvTable[OP_ADD_C] = sizeof(cell_t);
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OpAdvTable[OP_SMUL_C] = sizeof(cell_t);
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OpAdvTable[OP_ZERO] = sizeof(cell_t);
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OpAdvTable[OP_ZERO_S] = sizeof(cell_t);
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OpAdvTable[OP_EQ_C_PRI] = sizeof(cell_t);
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OpAdvTable[OP_EQ_C_ALT] = sizeof(cell_t);
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OpAdvTable[OP_INC] = sizeof(cell_t);
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OpAdvTable[OP_INC_S] = sizeof(cell_t);
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OpAdvTable[OP_DEC] = sizeof(cell_t);
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OpAdvTable[OP_DEC_S] = sizeof(cell_t);
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OpAdvTable[OP_MOVS] = sizeof(cell_t);
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OpAdvTable[OP_CMPS] = sizeof(cell_t);
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OpAdvTable[OP_FILL] = sizeof(cell_t);
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OpAdvTable[OP_HALT] = sizeof(cell_t);
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OpAdvTable[OP_BOUNDS] = sizeof(cell_t);
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OpAdvTable[OP_PUSH_ADR] = sizeof(cell_t);
|
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OpAdvTable[OP_PUSH_HEAP_C] = sizeof(cell_t);
|
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OpAdvTable[OP_SYSREQ_C] = sizeof(cell_t);
|
|
|
|
/* instructions with 0 parameters */
|
|
OpAdvTable[OP_LOAD_I] = 0;
|
|
OpAdvTable[OP_STOR_I] = 0;
|
|
OpAdvTable[OP_LIDX] = 0;
|
|
OpAdvTable[OP_IDXADDR] = 0;
|
|
OpAdvTable[OP_MOVE_PRI] = 0;
|
|
OpAdvTable[OP_MOVE_ALT] = 0;
|
|
OpAdvTable[OP_XCHG] = 0;
|
|
OpAdvTable[OP_PUSH_PRI] = 0;
|
|
OpAdvTable[OP_PUSH_ALT] = 0;
|
|
OpAdvTable[OP_POP_PRI] = 0;
|
|
OpAdvTable[OP_POP_ALT] = 0;
|
|
OpAdvTable[OP_PROC] = 0;
|
|
OpAdvTable[OP_RET] = 0;
|
|
OpAdvTable[OP_RETN] = 0;
|
|
OpAdvTable[OP_CALL_PRI] = 0;
|
|
OpAdvTable[OP_SHL] = 0;
|
|
OpAdvTable[OP_SHR] = 0;
|
|
OpAdvTable[OP_SSHR] = 0;
|
|
OpAdvTable[OP_SMUL] = 0;
|
|
OpAdvTable[OP_SDIV] = 0;
|
|
OpAdvTable[OP_SDIV_ALT] = 0;
|
|
OpAdvTable[OP_UMUL] = 0;
|
|
OpAdvTable[OP_UDIV] = 0;
|
|
OpAdvTable[OP_UDIV_ALT] = 0;
|
|
OpAdvTable[OP_ADD] = 0;
|
|
OpAdvTable[OP_SUB] = 0;
|
|
OpAdvTable[OP_SUB_ALT] = 0;
|
|
OpAdvTable[OP_AND] = 0;
|
|
OpAdvTable[OP_OR] = 0;
|
|
OpAdvTable[OP_XOR] = 0;
|
|
OpAdvTable[OP_NOT] = 0;
|
|
OpAdvTable[OP_NEG] = 0;
|
|
OpAdvTable[OP_INVERT] = 0;
|
|
OpAdvTable[OP_ZERO_PRI] = 0;
|
|
OpAdvTable[OP_ZERO_ALT] = 0;
|
|
OpAdvTable[OP_SIGN_PRI] = 0;
|
|
OpAdvTable[OP_SIGN_ALT] = 0;
|
|
OpAdvTable[OP_EQ] = 0;
|
|
OpAdvTable[OP_NEQ] = 0;
|
|
OpAdvTable[OP_LESS] = 0;
|
|
OpAdvTable[OP_LEQ] = 0;
|
|
OpAdvTable[OP_GRTR] = 0;
|
|
OpAdvTable[OP_GEQ] = 0;
|
|
OpAdvTable[OP_SLESS] = 0;
|
|
OpAdvTable[OP_SLEQ] = 0;
|
|
OpAdvTable[OP_SGRTR] = 0;
|
|
OpAdvTable[OP_SGEQ] = 0;
|
|
OpAdvTable[OP_INC_PRI] = 0;
|
|
OpAdvTable[OP_INC_ALT] = 0;
|
|
OpAdvTable[OP_INC_I] = 0;
|
|
OpAdvTable[OP_DEC_PRI] = 0;
|
|
OpAdvTable[OP_DEC_ALT] = 0;
|
|
OpAdvTable[OP_DEC_I] = 0;
|
|
OpAdvTable[OP_JUMP_PRI] = 0;
|
|
OpAdvTable[OP_SWAP_PRI] = 0;
|
|
OpAdvTable[OP_SWAP_ALT] = 0;
|
|
OpAdvTable[OP_NOP] = 0;
|
|
OpAdvTable[OP_BREAK] = 0;
|
|
OpAdvTable[OP_HEAP_PRI] = 0;
|
|
OpAdvTable[OP_POP_HEAP_PRI] = 0;
|
|
OpAdvTable[OP_SYSREQ_PRI] = 0;
|
|
|
|
/* opcodes that need relocation */
|
|
OpAdvTable[OP_CALL] = -2;
|
|
OpAdvTable[OP_JUMP] = -2;
|
|
OpAdvTable[OP_JZER] = -2;
|
|
OpAdvTable[OP_JNZ] = -2;
|
|
OpAdvTable[OP_JEQ] = -2;
|
|
OpAdvTable[OP_JNEQ] = -2;
|
|
OpAdvTable[OP_JLESS] = -2;
|
|
OpAdvTable[OP_JLEQ] = -2;
|
|
OpAdvTable[OP_JGRTR] = -2;
|
|
OpAdvTable[OP_JGEQ] = -2;
|
|
OpAdvTable[OP_JSLESS] = -2;
|
|
OpAdvTable[OP_JSLEQ] = -2;
|
|
OpAdvTable[OP_JSGRTR] = -2;
|
|
OpAdvTable[OP_JSGEQ] = -2;
|
|
OpAdvTable[OP_SWITCH] = -2;
|
|
|
|
/* opcodes that are totally invalid */
|
|
OpAdvTable[OP_FILE] = -3;
|
|
OpAdvTable[OP_SYMBOL] = -3;
|
|
OpAdvTable[OP_LINE] = -3;
|
|
OpAdvTable[OP_SRANGE] = -3;
|
|
OpAdvTable[OP_SYMTAG] = -3;
|
|
OpAdvTable[OP_SYSREQ_D] = -3;
|
|
OpAdvTable[OP_SYSREQ_ND] = -3;
|
|
OpAdvTable[OP_PUSH_R] = -3;
|
|
}
|
|
|