From f7df595ca51498bec8e3c315d5dc505a4bdc2cc8 Mon Sep 17 00:00:00 2001 From: David Anderson Date: Wed, 20 Sep 2006 02:56:20 +0000 Subject: [PATCH] note! we're still not at the point of a build committed here to fill in more structural integrity --HG-- extra : convert_revision : svn%3A39bc706e-5318-0410-9160-8a85361fbb7c/trunk%4075 --- sourcepawn/vm/jit/jit_helpers.h | 4 +- sourcepawn/vm/jit/x86/jit_x86.cpp | 400 +++++++++++--------- sourcepawn/vm/jit/x86/jit_x86.h | 182 +-------- sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj | 12 +- sourcepawn/vm/jit/x86/opcode_helpers.cpp | 267 +++++++++++++ sourcepawn/vm/jit/x86/opcode_helpers.h | 184 +++++++++ sourcepawn/vm/jit/x86/x86_macros.h | 414 ++++++++++----------- 7 files changed, 914 insertions(+), 549 deletions(-) create mode 100644 sourcepawn/vm/jit/x86/opcode_helpers.cpp create mode 100644 sourcepawn/vm/jit/x86/opcode_helpers.h diff --git a/sourcepawn/vm/jit/jit_helpers.h b/sourcepawn/vm/jit/jit_helpers.h index 0b8fcda6..bbfda1ec 100644 --- a/sourcepawn/vm/jit/jit_helpers.h +++ b/sourcepawn/vm/jit/jit_helpers.h @@ -32,7 +32,7 @@ public: inptr++; return val; } - inline cell_t read_cellptr() + inline cell_t *read_cellptr() { cell_t *val = *(cell_t **)(inptr); inptr++; @@ -58,7 +58,7 @@ public: { if (outptr) { - *(jit_int32_t *)ptr = c; + *(jit_int32_t *)outptr = c; } outptr += sizeof(jit_int32_t); } diff --git a/sourcepawn/vm/jit/x86/jit_x86.cpp b/sourcepawn/vm/jit/x86/jit_x86.cpp index 18870336..0e6bb669 100644 --- a/sourcepawn/vm/jit/x86/jit_x86.cpp +++ b/sourcepawn/vm/jit/x86/jit_x86.cpp @@ -1,183 +1,129 @@ #include #include #include "jit_x86.h" +#include "..\jit_helpers.h" +#include "opcode_helpers.h" +#include "x86_macros.h" -int OpAdvTable[OP_NUM_OPCODES]; - -JITX86::JITX86() +inline void WriteOp_Move_Pri(JitWriter *jit) { - memset(OpAdvTable, -1, sizeof(OpAdvTable)); + //mov eax, edx + IA32_Mov_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); +} - /* instructions with 5 parameters */ - OpAdvTable[OP_PUSH5_C] = sizeof(cell_t)*5; - OpAdvTable[OP_PUSH5] = sizeof(cell_t)*5; - OpAdvTable[OP_PUSH5_S] = sizeof(cell_t)*5; - OpAdvTable[OP_PUSH5_ADR] = sizeof(cell_t)*5; +inline void WriteOp_Move_Alt(JitWriter *jit) +{ + //mov edx, eax + IA32_Mov_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_PRI, MOD_REG); +} - /* instructions with 4 parameters */ - OpAdvTable[OP_PUSH4_C] = sizeof(cell_t)*4; - OpAdvTable[OP_PUSH4] = sizeof(cell_t)*4; - OpAdvTable[OP_PUSH4_S] = sizeof(cell_t)*4; - OpAdvTable[OP_PUSH4_ADR] = sizeof(cell_t)*4; +inline void WriteOp_Xchg(JitWriter *jit) +{ + /* :TODO: change this? */ + //xchg eax, edx + IA32_Xchg_Eax_Reg(jit, AMX_REG_ALT); +} - /* instructions with 3 parameters */ - OpAdvTable[OP_PUSH3_C] = sizeof(cell_t)*3; - OpAdvTable[OP_PUSH3] = sizeof(cell_t)*3; - OpAdvTable[OP_PUSH3_S] = sizeof(cell_t)*3; - OpAdvTable[OP_PUSH3_ADR] = sizeof(cell_t)*3; +inline void WriteOp_Push(JitWriter *jit) +{ + //push stack, DAT offset based + //sub ebp, 4 + //mov ecx, [edi+] + //mov [ebp], ecx + cell_t val = jit->read_cell(); + IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); + //optimize encoding a bit... + if (val < SCHAR_MAX && val > SCHAR_MIN) + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val); + else + IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val); + IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG); +} - /* instructions with 2 parameters */ - OpAdvTable[OP_PUSH2_C] = sizeof(cell_t)*2; - OpAdvTable[OP_PUSH2] = sizeof(cell_t)*2; - OpAdvTable[OP_PUSH2_S] = sizeof(cell_t)*2; - OpAdvTable[OP_PUSH2_ADR] = sizeof(cell_t)*2; - OpAdvTable[OP_LOAD_BOTH] = sizeof(cell_t)*2; - OpAdvTable[OP_LOAD_S_BOTH] = sizeof(cell_t)*2; - OpAdvTable[OP_CONST] = sizeof(cell_t)*2; - OpAdvTable[OP_CONST_S] = sizeof(cell_t)*2; +inline void WriteOp_Push_S(JitWriter *jit) +{ + //push stack, FRM offset based + //sub ebp, 4 + //mov ecx, [ebx+] + //mov [ebp], ecx + cell_t val = jit->read_cell(); + IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); + //optimize encoding a bit... + if (val < SCHAR_MAX && val > SCHAR_MIN) + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val); + else + IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val); + IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG); +} - /* instructions with 1 parameter */ - OpAdvTable[OP_LOAD_PRI] = sizeof(cell_t); - OpAdvTable[OP_LOAD_ALT] = sizeof(cell_t); - OpAdvTable[OP_LOAD_S_PRI] = sizeof(cell_t); - OpAdvTable[OP_LOAD_S_ALT] = sizeof(cell_t); - OpAdvTable[OP_LREF_PRI] = sizeof(cell_t); - OpAdvTable[OP_LREF_ALT] = sizeof(cell_t); - OpAdvTable[OP_LREF_S_PRI] = sizeof(cell_t); - OpAdvTable[OP_LREF_S_ALT] = sizeof(cell_t); - OpAdvTable[OP_LODB_I] = sizeof(cell_t); - OpAdvTable[OP_CONST_PRI] = sizeof(cell_t); - OpAdvTable[OP_CONST_ALT] = sizeof(cell_t); - OpAdvTable[OP_ADDR_PRI] = sizeof(cell_t); - OpAdvTable[OP_ADDR_ALT] = sizeof(cell_t); - OpAdvTable[OP_STOR_PRI] = sizeof(cell_t); - OpAdvTable[OP_STOR_ALT] = sizeof(cell_t); - OpAdvTable[OP_STOR_S_PRI] = sizeof(cell_t); - OpAdvTable[OP_STOR_S_ALT] = sizeof(cell_t); - OpAdvTable[OP_SREF_PRI] = sizeof(cell_t); - OpAdvTable[OP_SREF_ALT] = sizeof(cell_t); - OpAdvTable[OP_SREF_S_PRI] = sizeof(cell_t); - OpAdvTable[OP_SREF_S_ALT] = sizeof(cell_t); - OpAdvTable[OP_STRB_I] = sizeof(cell_t); - OpAdvTable[OP_LIDX_B] = sizeof(cell_t); - OpAdvTable[OP_IDXADDR_B] = sizeof(cell_t); - OpAdvTable[OP_ALIGN_PRI] = sizeof(cell_t); - OpAdvTable[OP_ALIGN_ALT] = sizeof(cell_t); - OpAdvTable[OP_LCTRL] = sizeof(cell_t); - OpAdvTable[OP_SCTRL] = sizeof(cell_t); - OpAdvTable[OP_PUSH_R] = sizeof(cell_t); - OpAdvTable[OP_PUSH_C] = sizeof(cell_t); - OpAdvTable[OP_PUSH] = sizeof(cell_t); - OpAdvTable[OP_PUSH_S] = sizeof(cell_t); - OpAdvTable[OP_STACK] = sizeof(cell_t); - OpAdvTable[OP_HEAP] = sizeof(cell_t); - OpAdvTable[OP_JREL] = sizeof(cell_t); - OpAdvTable[OP_SHL_C_PRI] = sizeof(cell_t); - OpAdvTable[OP_SHL_C_ALT] = sizeof(cell_t); - OpAdvTable[OP_SHR_C_PRI] = sizeof(cell_t); - OpAdvTable[OP_SHR_C_ALT] = sizeof(cell_t); - OpAdvTable[OP_ADD_C] = sizeof(cell_t); - OpAdvTable[OP_SMUL_C] = sizeof(cell_t); - OpAdvTable[OP_ZERO] = sizeof(cell_t); - OpAdvTable[OP_ZERO_S] = sizeof(cell_t); - OpAdvTable[OP_EQ_C_PRI] = sizeof(cell_t); - OpAdvTable[OP_EQ_C_ALT] = sizeof(cell_t); - OpAdvTable[OP_INC] = sizeof(cell_t); - OpAdvTable[OP_INC_S] = sizeof(cell_t); - OpAdvTable[OP_DEC] = sizeof(cell_t); - OpAdvTable[OP_DEC_S] = sizeof(cell_t); - OpAdvTable[OP_MOVS] = sizeof(cell_t); - OpAdvTable[OP_CMPS] = sizeof(cell_t); - OpAdvTable[OP_FILL] = sizeof(cell_t); - OpAdvTable[OP_HALT] = sizeof(cell_t); - OpAdvTable[OP_BOUNDS] = sizeof(cell_t); - OpAdvTable[OP_PUSH_ADR] = sizeof(cell_t); +inline void WriteOp_Push4_C(JitWriter *jit) +{ + Macro_PushN_C(jit, 4); +} - /* instructions with 0 parameters */ - OpAdvTable[OP_LOAD_I] = 0; - OpAdvTable[OP_STOR_I] = 0; - OpAdvTable[OP_LIDX] = 0; - OpAdvTable[OP_IDXADDR] = 0; - OpAdvTable[OP_MOVE_PRI] = 0; - OpAdvTable[OP_MOVE_ALT] = 0; - OpAdvTable[OP_XCHG] = 0; - OpAdvTable[OP_PUSH_PRI] = 0; - OpAdvTable[OP_PUSH_ALT] = 0; - OpAdvTable[OP_POP_PRI] = 0; - OpAdvTable[OP_POP_ALT] = 0; - OpAdvTable[OP_PROC] = 0; - OpAdvTable[OP_RET] = 0; - OpAdvTable[OP_RETN] = 0; - OpAdvTable[OP_CALL_PRI] = 0; - OpAdvTable[OP_SHL] = 0; - OpAdvTable[OP_SHR] = 0; - OpAdvTable[OP_SSHR] = 0; - OpAdvTable[OP_SMUL] = 0; - OpAdvTable[OP_SDIV] = 0; - OpAdvTable[OP_SDIV_ALT] = 0; - OpAdvTable[OP_UMUL] = 0; - OpAdvTable[OP_UDIV] = 0; - OpAdvTable[OP_UDIV_ALT] = 0; - OpAdvTable[OP_ADD] = 0; - OpAdvTable[OP_SUB] = 0; - OpAdvTable[OP_SUB_ALT] = 0; - OpAdvTable[OP_AND] = 0; - OpAdvTable[OP_OR] = 0; - OpAdvTable[OP_XOR] = 0; - OpAdvTable[OP_NOT] = 0; - OpAdvTable[OP_NEG] = 0; - OpAdvTable[OP_INVERT] = 0; - OpAdvTable[OP_ZERO_PRI] = 0; - OpAdvTable[OP_ZERO_ALT] = 0; - OpAdvTable[OP_SIGN_PRI] = 0; - OpAdvTable[OP_SIGN_ALT] = 0; - OpAdvTable[OP_EQ] = 0; - OpAdvTable[OP_NEQ] = 0; - OpAdvTable[OP_LESS] = 0; - OpAdvTable[OP_LEQ] = 0; - OpAdvTable[OP_GRTR] = 0; - OpAdvTable[OP_GEQ] = 0; - OpAdvTable[OP_SLESS] = 0; - OpAdvTable[OP_SLEQ] = 0; - OpAdvTable[OP_SGRTR] = 0; - OpAdvTable[OP_SGEQ] = 0; - OpAdvTable[OP_INC_PRI] = 0; - OpAdvTable[OP_INC_ALT] = 0; - OpAdvTable[OP_INC_I] = 0; - OpAdvTable[OP_DEC_PRI] = 0; - OpAdvTable[OP_DEC_ALT] = 0; - OpAdvTable[OP_DEC_I] = 0; - OpAdvTable[OP_JUMP_PRI] = 0; - OpAdvTable[OP_SWAP_PRI] = 0; - OpAdvTable[OP_SWAP_ALT] = 0; - OpAdvTable[OP_NOP] = 0; - OpAdvTable[OP_BREAK] = 0; +inline void WriteOp_Push5_C(JitWriter *jit) +{ + Macro_PushN_C(jit, 5); +} - /* opcodes that need relocation */ - OpAdvTable[OP_CALL] = -2; - OpAdvTable[OP_JUMP] = -2; - OpAdvTable[OP_JZER] = -2; - OpAdvTable[OP_JNZ] = -2; - OpAdvTable[OP_JEQ] = -2; - OpAdvTable[OP_JNEQ] = -2; - OpAdvTable[OP_JLESS] = -2; - OpAdvTable[OP_JLEQ] = -2; - OpAdvTable[OP_JGRTR] = -2; - OpAdvTable[OP_JGEQ] = -2; - OpAdvTable[OP_JSLESS] = -2; - OpAdvTable[OP_JSLEQ] = -2; - OpAdvTable[OP_JSGRTR] = -2; - OpAdvTable[OP_JSGEQ] = -2; - OpAdvTable[OP_SWITCH] = -2; +inline void WriteOp_Push2_Adr(JitWriter *jit) +{ + Macro_PushN_Addr(jit, 2); +} - /* opcodes that are totally invalid */ - OpAdvTable[OP_FILE] = -3; - OpAdvTable[OP_SYMBOL] = -3; - OpAdvTable[OP_LINE] = -3; - OpAdvTable[OP_SRANGE] = -3; - OpAdvTable[OP_SYMTAG] = -3; - OpAdvTable[OP_SYSREQ_D] = -3; - OpAdvTable[OP_SYSREQ_ND] = -3; +inline void WriteOp_Push3_Adr(JitWriter *jit) +{ + Macro_PushN_Addr(jit, 3); +} + +inline void WriteOp_Push4_Adr(JitWriter *jit) +{ + Macro_PushN_Addr(jit, 4); +} + +inline void WriteOp_Push5_Adr(JitWriter *jit) +{ + Macro_PushN_Addr(jit, 5); +} + +inline void WriteOp_Push2_S(JitWriter *jit) +{ + Macro_PushN_S(jit, 2); +} + +inline void WriteOp_Push3_S(JitWriter *jit) +{ + Macro_PushN_S(jit, 3); +} + +inline void WriteOp_Push4_S(JitWriter *jit) +{ + Macro_PushN_S(jit, 4); +} + +inline void WriteOp_Push5_S(JitWriter *jit) +{ + Macro_PushN_S(jit, 5); +} + +inline void WriteOp_Push5(JitWriter *jit) +{ + Macro_PushN(jit, 5); +} + +inline void WriteOp_Push4(JitWriter *jit) +{ + Macro_PushN(jit, 4); +} + +inline void WriteOp_Push3(JitWriter *jit) +{ + Macro_PushN(jit, 3); +} + +inline void WriteOp_Push2(JitWriter *jit) +{ + Macro_PushN(jit, 2); } IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err) @@ -246,6 +192,126 @@ IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err) } } + JitWriter writer; + + writer.inptr = (cell_t *)code; + writer.outptr = NULL; + writer.outbase = NULL; + +//redo_pass: + /* SECOND PASS (medium load): writer.outbase is NULL, getting size only + * THIRD PASS (heavy load!!): writer.outbase is valid and output is written + */ + cell_t *endptr = (cell_t *)(end_cip); + JitWriter *jit = &writer; + for (; writer.inptr <= endptr;) + { + op = (OPCODE)writer.read_cell(); + switch (op) + { + case OP_MOVE_PRI: + { + WriteOp_Move_Pri(jit); + break; + } + case OP_MOVE_ALT: + { + WriteOp_Move_Alt(jit); + break; + } + case OP_XCHG: + { + WriteOp_Xchg(jit); + break; + } + case OP_PUSH: + { + WriteOp_Push(jit); + break; + } + case OP_PUSH_S: + { + WriteOp_Push_S(jit); + break; + } + case OP_PUSH4_C: + { + WriteOp_Push4_C(jit); + break; + } + case OP_PUSH5_C: + { + WriteOp_Push5_C(jit); + break; + } + case OP_PUSH2_ADR: + { + WriteOp_Push2_Adr(jit); + break; + } + case OP_PUSH3_ADR: + { + WriteOp_Push3_Adr(jit); + break; + } + case OP_PUSH4_ADR: + { + WriteOp_Push4_Adr(jit); + break; + } + case OP_PUSH5_ADR: + { + WriteOp_Push5_Adr(jit); + break; + } + case OP_PUSH2_S: + { + WriteOp_Push2_S(jit); + break; + } + case OP_PUSH3_S: + { + WriteOp_Push3_S(jit); + break; + } + case OP_PUSH4_S: + { + WriteOp_Push4_S(jit); + break; + } + case OP_PUSH5_S: + { + WriteOp_Push5_S(jit); + break; + } + case OP_PUSH5: + { + WriteOp_Push5(jit); + break; + } + case OP_PUSH4: + { + WriteOp_Push4(jit); + break; + } + case OP_PUSH3: + { + WriteOp_Push3(jit); + break; + } + case OP_PUSH2: + { + WriteOp_Push2(jit); + break; + } + default: + { + /* :TODO: error! */ + break; + } + } + } + *err = SP_ERR_NONE; return NULL; diff --git a/sourcepawn/vm/jit/x86/jit_x86.h b/sourcepawn/vm/jit/x86/jit_x86.h index acc1764a..b78ca8a2 100644 --- a/sourcepawn/vm/jit/x86/jit_x86.h +++ b/sourcepawn/vm/jit/x86/jit_x86.h @@ -1,6 +1,7 @@ #ifndef _INCLUDE_SOURCEPAWN_JIT_X86_H_ #define _INCLUDE_SOURCEPAWN_JIT_X86_H_ +#include #include using namespace SourcePawn; @@ -31,175 +32,16 @@ public: int ContextExecute(sp_context_t *ctx, uint32_t code_idx, cell_t *result); }; -typedef enum -{ - OP_NONE, /* invalid opcode */ - OP_LOAD_PRI, //DONE - OP_LOAD_ALT, //DONE - OP_LOAD_S_PRI, //DONE - OP_LOAD_S_ALT, //DONE - OP_LREF_PRI, //DONE - OP_LREF_ALT, //DONE - OP_LREF_S_PRI, //DONE - OP_LREF_S_ALT, //DONE - OP_LOAD_I, //DONE - OP_LODB_I, - OP_CONST_PRI, //DONE - OP_CONST_ALT, //DONE - OP_ADDR_PRI, //DONE - OP_ADDR_ALT, //DONE - OP_STOR_PRI, //DONE - OP_STOR_ALT, //DONE - OP_STOR_S_PRI, //DONE - OP_STOR_S_ALT, //DONE - OP_SREF_PRI, //DONE - OP_SREF_ALT, //DONE - OP_SREF_S_PRI, //DONE - OP_SREF_S_ALT, //DONE - OP_STOR_I, //DONE - OP_STRB_I, - OP_LIDX, //DONE - OP_LIDX_B, - OP_IDXADDR, //DONE - OP_IDXADDR_B, - OP_ALIGN_PRI, //DONE - OP_ALIGN_ALT, //DONE - OP_LCTRL, - OP_SCTRL, - OP_MOVE_PRI, //DONE - OP_MOVE_ALT, //DONE - OP_XCHG, //DONE - OP_PUSH_PRI, //DONE - OP_PUSH_ALT, //DONE - OP_PUSH_R, //DONE - OP_PUSH_C, //DONE - OP_PUSH, //DONE - OP_PUSH_S, //DONE - OP_POP_PRI, //DONE - OP_POP_ALT, //DONE - OP_STACK, //DONE - OP_HEAP, //DONE - OP_PROC, //DONE - OP_RET, - OP_RETN, //DONE - OP_CALL, - OP_CALL_PRI, - OP_JUMP, //DONE - OP_JREL, //DONE - OP_JZER, //DONE - OP_JNZ, //DONE - OP_JEQ, //DONE - OP_JNEQ, //DONE - OP_JLESS, //DONE - OP_JLEQ, //DONE - OP_JGRTR, //DONE - OP_JGEQ, //DONE - OP_JSLESS, //DONE - OP_JSLEQ, //DONE - OP_JSGRTR, //DONE - OP_JSGEQ, //DONE - OP_SHL, //DONE - OP_SHR, //DONE - OP_SSHR, //DONE - OP_SHL_C_PRI, //DONE - OP_SHL_C_ALT, //DONE - OP_SHR_C_PRI, //DONE - OP_SHR_C_ALT, //DONE - OP_SMUL, //DONE - OP_SDIV, //DONE - OP_SDIV_ALT, //DONE - OP_UMUL, //DONE - OP_UDIV, //DONE - OP_UDIV_ALT, //DONE - OP_ADD, //DONE - OP_SUB, //DONE - OP_SUB_ALT, //DONE - OP_AND, //DONE - OP_OR, //DONE - OP_XOR, //DONE - OP_NOT, //DONE - OP_NEG, //DONE - OP_INVERT, //DONE - OP_ADD_C, //DONE - OP_SMUL_C, //DONE - OP_ZERO_PRI, //DONE - OP_ZERO_ALT, //DONE - OP_ZERO, //DONE - OP_ZERO_S, //DONE - OP_SIGN_PRI, //DONE - OP_SIGN_ALT, //DONE - OP_EQ, //DONE - OP_NEQ, //DONE - OP_LESS, //DONE - OP_LEQ, //DONE - OP_GRTR, //DONE - OP_GEQ, //DONE - OP_SLESS, //DONE - OP_SLEQ, //DONE - OP_SGRTR, //DONE - OP_SGEQ, //DONE - OP_EQ_C_PRI, //DONE - OP_EQ_C_ALT, //DONE - OP_INC_PRI, //DONE - OP_INC_ALT, //DONE - OP_INC, //DONE - OP_INC_S, //DONE - OP_INC_I, //DONE - OP_DEC_PRI, //DONE - OP_DEC_ALT, //DONE - OP_DEC, //DONE - OP_DEC_S, //DONE - OP_DEC_I, //DONE - OP_MOVS, //DONE - OP_CMPS, //DONE - OP_FILL, //DONE - OP_HALT, //DONE - OP_BOUNDS, - OP_SYSREQ_PRI, - OP_SYSREQ_C, - OP_FILE, - OP_LINE, - OP_SYMBOL, - OP_SRANGE, - OP_JUMP_PRI, - OP_SWITCH, - OP_CASETBL, //DONE - OP_SWAP_PRI, //DONE - OP_SWAP_ALT, //DONE - OP_PUSH_ADR, //DONE - OP_NOP, //DONE - OP_SYSREQ_N, - OP_SYMTAG, - OP_BREAK, - OP_PUSH2_C, //DONE - OP_PUSH2, //DONE - OP_PUSH2_S, //DONE - OP_PUSH2_ADR, //DONE - OP_PUSH3_C, //DONE - OP_PUSH3, //DONE - OP_PUSH3_S, //DONE - OP_PUSH3_ADR, //DONE - OP_PUSH4_C, //DONE - OP_PUSH4, //DONE - OP_PUSH4_S, //DONE - OP_PUSH4_ADR, //DONE - OP_PUSH5_C, //DONE - OP_PUSH5, //DONE - OP_PUSH5_S, //DONE - OP_PUSH5_ADR, //DONE - OP_LOAD_BOTH, - OP_LOAD_S_BOTH, - OP_CONST, - OP_CONST_S, - /* ----- */ - OP_SYSREQ_D, - OP_SYSREQ_ND, - /* ----- */ - OP_HEAP_PRI, - OP_PUSH_HEAP_C, - OP_POP_HEAP_PRI, - /* ----- */ - OP_NUM_OPCODES -} OPCODE; +#define AMX_REG_PRI REG_EAX +#define AMX_REG_ALT REG_EDX +#define AMX_REG_STK REG_EBP +#define AMX_REG_DAT REG_EDI +#define AMX_REG_TMP REG_ECX +#define AMX_REG_INFO REG_ESI +#define AMX_REG_FRM REG_EBX + +#define AMX_INFO_FRM AMX_REG_INFO +#define AMX_INFO_HEAP 4 +#define AMX_INFO_RETVAL 12 #endif //_INCLUDE_SOURCEPAWN_JIT_X86_H_ diff --git a/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj b/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj index 037ef66b..f5607836 100644 --- a/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj +++ b/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj @@ -191,6 +191,10 @@ RelativePath="..\jit_x86.cpp" > + + + + diff --git a/sourcepawn/vm/jit/x86/opcode_helpers.cpp b/sourcepawn/vm/jit/x86/opcode_helpers.cpp new file mode 100644 index 00000000..879abbf1 --- /dev/null +++ b/sourcepawn/vm/jit/x86/opcode_helpers.cpp @@ -0,0 +1,267 @@ +#include +#include +#include "jit_x86.h" +#include "opcode_helpers.h" +#include "x86_macros.h" + +int OpAdvTable[OP_NUM_OPCODES]; + +void Macro_PushN_Addr(JitWriter *jit, int i) +{ + //push eax + //mov eax, frm + //loop i times: + // lea ecx, [eax+] + // mov [ebp-4*i], ecx + //sub ebp, 4*N + //pop eax + + cell_t val; + int n = 1; + IA32_Push_Reg(jit, AMX_REG_PRI); + IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_INFO_FRM, MOD_MEM_REG); + do + { + val = jit->read_cell(); + if (val < SCHAR_MAX && val > SCHAR_MIN) + IA32_Lea_DispRegImm8(jit, AMX_REG_TMP, AMX_REG_PRI, (jit_int8_t)val); + else + IA32_Lea_DispRegImm32(jit, AMX_REG_TMP, AMX_REG_PRI, val); + IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n); + } while (n++ < i); + IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG); + IA32_Pop_Reg(jit, AMX_REG_PRI); +} + +void Macro_PushN_S(JitWriter *jit, int i) +{ + //loop i times: + // mov ecx, [ebx+] + // mov [ebp-4*i], ecx + //sub ebp, 4*N + + cell_t val; + int n = 1; + do + { + val = jit->read_cell(); + if (val < SCHAR_MAX && val > SCHAR_MIN) + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val); + else + IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val); + IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n); + } while (n++ < i); + IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG); +} + +void Macro_PushN_C(JitWriter *jit, int i) +{ + //loop i times: + // mov [ebp-4*i], + //sub ebp, 4*N + + int n = 1; + do + { + IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_STK, jit->read_cell(), -4*n); + } while (n++ < i); + IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG); +} + +void Macro_PushN(JitWriter *jit, int i) +{ + //loop i times: + // mov ecx, [edi+] + // mov [ebp-4*i], ecx + //sub ebp, 4*N + + cell_t val; + int n = 1; + do + { + val = jit->read_cell(); + if (val < SCHAR_MAX && val > SCHAR_MIN) + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val); + else + IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val); + IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4*n); + } while (n++ < i); + IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4*i, MOD_REG); +} + +JITX86::JITX86() +{ + memset(OpAdvTable, -1, sizeof(OpAdvTable)); + + /* instructions with 5 parameters */ + OpAdvTable[OP_PUSH5_C] = sizeof(cell_t)*5; + OpAdvTable[OP_PUSH5] = sizeof(cell_t)*5; + OpAdvTable[OP_PUSH5_S] = sizeof(cell_t)*5; + OpAdvTable[OP_PUSH5_ADR] = sizeof(cell_t)*5; + + /* instructions with 4 parameters */ + OpAdvTable[OP_PUSH4_C] = sizeof(cell_t)*4; + OpAdvTable[OP_PUSH4] = sizeof(cell_t)*4; + OpAdvTable[OP_PUSH4_S] = sizeof(cell_t)*4; + OpAdvTable[OP_PUSH4_ADR] = sizeof(cell_t)*4; + + /* instructions with 3 parameters */ + OpAdvTable[OP_PUSH3_C] = sizeof(cell_t)*3; + OpAdvTable[OP_PUSH3] = sizeof(cell_t)*3; + OpAdvTable[OP_PUSH3_S] = sizeof(cell_t)*3; + OpAdvTable[OP_PUSH3_ADR] = sizeof(cell_t)*3; + + /* instructions with 2 parameters */ + OpAdvTable[OP_PUSH2_C] = sizeof(cell_t)*2; + OpAdvTable[OP_PUSH2] = sizeof(cell_t)*2; + OpAdvTable[OP_PUSH2_S] = sizeof(cell_t)*2; + OpAdvTable[OP_PUSH2_ADR] = sizeof(cell_t)*2; + OpAdvTable[OP_LOAD_BOTH] = sizeof(cell_t)*2; + OpAdvTable[OP_LOAD_S_BOTH] = sizeof(cell_t)*2; + OpAdvTable[OP_CONST] = sizeof(cell_t)*2; + OpAdvTable[OP_CONST_S] = sizeof(cell_t)*2; + + /* instructions with 1 parameter */ + OpAdvTable[OP_LOAD_PRI] = sizeof(cell_t); + OpAdvTable[OP_LOAD_ALT] = sizeof(cell_t); + OpAdvTable[OP_LOAD_S_PRI] = sizeof(cell_t); + OpAdvTable[OP_LOAD_S_ALT] = sizeof(cell_t); + OpAdvTable[OP_LREF_PRI] = sizeof(cell_t); + OpAdvTable[OP_LREF_ALT] = sizeof(cell_t); + OpAdvTable[OP_LREF_S_PRI] = sizeof(cell_t); + OpAdvTable[OP_LREF_S_ALT] = sizeof(cell_t); + OpAdvTable[OP_LODB_I] = sizeof(cell_t); + OpAdvTable[OP_CONST_PRI] = sizeof(cell_t); + OpAdvTable[OP_CONST_ALT] = sizeof(cell_t); + OpAdvTable[OP_ADDR_PRI] = sizeof(cell_t); + OpAdvTable[OP_ADDR_ALT] = sizeof(cell_t); + OpAdvTable[OP_STOR_PRI] = sizeof(cell_t); + OpAdvTable[OP_STOR_ALT] = sizeof(cell_t); + OpAdvTable[OP_STOR_S_PRI] = sizeof(cell_t); + OpAdvTable[OP_STOR_S_ALT] = sizeof(cell_t); + OpAdvTable[OP_SREF_PRI] = sizeof(cell_t); + OpAdvTable[OP_SREF_ALT] = sizeof(cell_t); + OpAdvTable[OP_SREF_S_PRI] = sizeof(cell_t); + OpAdvTable[OP_SREF_S_ALT] = sizeof(cell_t); + OpAdvTable[OP_STRB_I] = sizeof(cell_t); + OpAdvTable[OP_LIDX_B] = sizeof(cell_t); + OpAdvTable[OP_IDXADDR_B] = sizeof(cell_t); + OpAdvTable[OP_ALIGN_PRI] = sizeof(cell_t); + OpAdvTable[OP_ALIGN_ALT] = sizeof(cell_t); + OpAdvTable[OP_LCTRL] = sizeof(cell_t); + OpAdvTable[OP_SCTRL] = sizeof(cell_t); + OpAdvTable[OP_PUSH_C] = sizeof(cell_t); + OpAdvTable[OP_PUSH] = sizeof(cell_t); + OpAdvTable[OP_PUSH_S] = sizeof(cell_t); + OpAdvTable[OP_STACK] = sizeof(cell_t); + OpAdvTable[OP_HEAP] = sizeof(cell_t); + OpAdvTable[OP_JREL] = sizeof(cell_t); + OpAdvTable[OP_SHL_C_PRI] = sizeof(cell_t); + OpAdvTable[OP_SHL_C_ALT] = sizeof(cell_t); + OpAdvTable[OP_SHR_C_PRI] = sizeof(cell_t); + OpAdvTable[OP_SHR_C_ALT] = sizeof(cell_t); + OpAdvTable[OP_ADD_C] = sizeof(cell_t); + OpAdvTable[OP_SMUL_C] = sizeof(cell_t); + OpAdvTable[OP_ZERO] = sizeof(cell_t); + OpAdvTable[OP_ZERO_S] = sizeof(cell_t); + OpAdvTable[OP_EQ_C_PRI] = sizeof(cell_t); + OpAdvTable[OP_EQ_C_ALT] = sizeof(cell_t); + OpAdvTable[OP_INC] = sizeof(cell_t); + OpAdvTable[OP_INC_S] = sizeof(cell_t); + OpAdvTable[OP_DEC] = sizeof(cell_t); + OpAdvTable[OP_DEC_S] = sizeof(cell_t); + OpAdvTable[OP_MOVS] = sizeof(cell_t); + OpAdvTable[OP_CMPS] = sizeof(cell_t); + OpAdvTable[OP_FILL] = sizeof(cell_t); + OpAdvTable[OP_HALT] = sizeof(cell_t); + OpAdvTable[OP_BOUNDS] = sizeof(cell_t); + OpAdvTable[OP_PUSH_ADR] = sizeof(cell_t); + + /* instructions with 0 parameters */ + OpAdvTable[OP_LOAD_I] = 0; + OpAdvTable[OP_STOR_I] = 0; + OpAdvTable[OP_LIDX] = 0; + OpAdvTable[OP_IDXADDR] = 0; + OpAdvTable[OP_MOVE_PRI] = 0; + OpAdvTable[OP_MOVE_ALT] = 0; + OpAdvTable[OP_XCHG] = 0; + OpAdvTable[OP_PUSH_PRI] = 0; + OpAdvTable[OP_PUSH_ALT] = 0; + OpAdvTable[OP_POP_PRI] = 0; + OpAdvTable[OP_POP_ALT] = 0; + OpAdvTable[OP_PROC] = 0; + OpAdvTable[OP_RET] = 0; + OpAdvTable[OP_RETN] = 0; + OpAdvTable[OP_CALL_PRI] = 0; + OpAdvTable[OP_SHL] = 0; + OpAdvTable[OP_SHR] = 0; + OpAdvTable[OP_SSHR] = 0; + OpAdvTable[OP_SMUL] = 0; + OpAdvTable[OP_SDIV] = 0; + OpAdvTable[OP_SDIV_ALT] = 0; + OpAdvTable[OP_UMUL] = 0; + OpAdvTable[OP_UDIV] = 0; + OpAdvTable[OP_UDIV_ALT] = 0; + OpAdvTable[OP_ADD] = 0; + OpAdvTable[OP_SUB] = 0; + OpAdvTable[OP_SUB_ALT] = 0; + OpAdvTable[OP_AND] = 0; + OpAdvTable[OP_OR] = 0; + OpAdvTable[OP_XOR] = 0; + OpAdvTable[OP_NOT] = 0; + OpAdvTable[OP_NEG] = 0; + OpAdvTable[OP_INVERT] = 0; + OpAdvTable[OP_ZERO_PRI] = 0; + OpAdvTable[OP_ZERO_ALT] = 0; + OpAdvTable[OP_SIGN_PRI] = 0; + OpAdvTable[OP_SIGN_ALT] = 0; + OpAdvTable[OP_EQ] = 0; + OpAdvTable[OP_NEQ] = 0; + OpAdvTable[OP_LESS] = 0; + OpAdvTable[OP_LEQ] = 0; + OpAdvTable[OP_GRTR] = 0; + OpAdvTable[OP_GEQ] = 0; + OpAdvTable[OP_SLESS] = 0; + OpAdvTable[OP_SLEQ] = 0; + OpAdvTable[OP_SGRTR] = 0; + OpAdvTable[OP_SGEQ] = 0; + OpAdvTable[OP_INC_PRI] = 0; + OpAdvTable[OP_INC_ALT] = 0; + OpAdvTable[OP_INC_I] = 0; + OpAdvTable[OP_DEC_PRI] = 0; + OpAdvTable[OP_DEC_ALT] = 0; + OpAdvTable[OP_DEC_I] = 0; + OpAdvTable[OP_JUMP_PRI] = 0; + OpAdvTable[OP_SWAP_PRI] = 0; + OpAdvTable[OP_SWAP_ALT] = 0; + OpAdvTable[OP_NOP] = 0; + OpAdvTable[OP_BREAK] = 0; + + /* opcodes that need relocation */ + OpAdvTable[OP_CALL] = -2; + OpAdvTable[OP_JUMP] = -2; + OpAdvTable[OP_JZER] = -2; + OpAdvTable[OP_JNZ] = -2; + OpAdvTable[OP_JEQ] = -2; + OpAdvTable[OP_JNEQ] = -2; + OpAdvTable[OP_JLESS] = -2; + OpAdvTable[OP_JLEQ] = -2; + OpAdvTable[OP_JGRTR] = -2; + OpAdvTable[OP_JGEQ] = -2; + OpAdvTable[OP_JSLESS] = -2; + OpAdvTable[OP_JSLEQ] = -2; + OpAdvTable[OP_JSGRTR] = -2; + OpAdvTable[OP_JSGEQ] = -2; + OpAdvTable[OP_SWITCH] = -2; + + /* opcodes that are totally invalid */ + OpAdvTable[OP_FILE] = -3; + OpAdvTable[OP_SYMBOL] = -3; + OpAdvTable[OP_LINE] = -3; + OpAdvTable[OP_SRANGE] = -3; + OpAdvTable[OP_SYMTAG] = -3; + OpAdvTable[OP_SYSREQ_D] = -3; + OpAdvTable[OP_SYSREQ_ND] = -3; + OpAdvTable[OP_PUSH_R] = -3; +} + diff --git a/sourcepawn/vm/jit/x86/opcode_helpers.h b/sourcepawn/vm/jit/x86/opcode_helpers.h new file mode 100644 index 00000000..66dc13d9 --- /dev/null +++ b/sourcepawn/vm/jit/x86/opcode_helpers.h @@ -0,0 +1,184 @@ +#ifndef _INCLUDE_SOURCEPAWN_JIT_X86_OPCODE_INFO_H_ +#define _INCLUDE_SOURCEPAWN_JIT_X86_OPCODE_INFO_H_ + +#include "..\jit_helpers.h" + +void Macro_PushN_Addr(JitWriter *jit, int i); +void Macro_PushN_S(JitWriter *jit, int i); +void Macro_PushN_C(JitWriter *jit, int i); +void Macro_PushN(JitWriter *jit, int i); + +typedef enum +{ + OP_NONE, /* invalid opcode */ + OP_LOAD_PRI, //DONE + OP_LOAD_ALT, //DONE + OP_LOAD_S_PRI, //DONE + OP_LOAD_S_ALT, //DONE + OP_LREF_PRI, //DONE + OP_LREF_ALT, //DONE + OP_LREF_S_PRI, //DONE + OP_LREF_S_ALT, //DONE + OP_LOAD_I, //DONE + OP_LODB_I, + OP_CONST_PRI, //DONE + OP_CONST_ALT, //DONE + OP_ADDR_PRI, //DONE + OP_ADDR_ALT, //DONE + OP_STOR_PRI, //DONE + OP_STOR_ALT, //DONE + OP_STOR_S_PRI, //DONE + OP_STOR_S_ALT, //DONE + OP_SREF_PRI, //DONE + OP_SREF_ALT, //DONE + OP_SREF_S_PRI, //DONE + OP_SREF_S_ALT, //DONE + OP_STOR_I, //DONE + OP_STRB_I, + OP_LIDX, //DONE + OP_LIDX_B, + OP_IDXADDR, //DONE + OP_IDXADDR_B, + OP_ALIGN_PRI, //DONE + OP_ALIGN_ALT, //DONE + OP_LCTRL, + OP_SCTRL, + OP_MOVE_PRI, //DONE + OP_MOVE_ALT, //DONE + OP_XCHG, //DONE + OP_PUSH_PRI, //DONE + OP_PUSH_ALT, //DONE + OP_PUSH_R, //DONE + OP_PUSH_C, //DONE + OP_PUSH, //DONE + OP_PUSH_S, //DONE + OP_POP_PRI, //DONE + OP_POP_ALT, //DONE + OP_STACK, //DONE + OP_HEAP, //DONE + OP_PROC, //DONE + OP_RET, + OP_RETN, //DONE + OP_CALL, + OP_CALL_PRI, + OP_JUMP, //DONE + OP_JREL, //DONE + OP_JZER, //DONE + OP_JNZ, //DONE + OP_JEQ, //DONE + OP_JNEQ, //DONE + OP_JLESS, //DONE + OP_JLEQ, //DONE + OP_JGRTR, //DONE + OP_JGEQ, //DONE + OP_JSLESS, //DONE + OP_JSLEQ, //DONE + OP_JSGRTR, //DONE + OP_JSGEQ, //DONE + OP_SHL, //DONE + OP_SHR, //DONE + OP_SSHR, //DONE + OP_SHL_C_PRI, //DONE + OP_SHL_C_ALT, //DONE + OP_SHR_C_PRI, //DONE + OP_SHR_C_ALT, //DONE + OP_SMUL, //DONE + OP_SDIV, //DONE + OP_SDIV_ALT, //DONE + OP_UMUL, //DONE + OP_UDIV, //DONE + OP_UDIV_ALT, //DONE + OP_ADD, //DONE + OP_SUB, //DONE + OP_SUB_ALT, //DONE + OP_AND, //DONE + OP_OR, //DONE + OP_XOR, //DONE + OP_NOT, //DONE + OP_NEG, //DONE + OP_INVERT, //DONE + OP_ADD_C, //DONE + OP_SMUL_C, //DONE + OP_ZERO_PRI, //DONE + OP_ZERO_ALT, //DONE + OP_ZERO, //DONE + OP_ZERO_S, //DONE + OP_SIGN_PRI, //DONE + OP_SIGN_ALT, //DONE + OP_EQ, //DONE + OP_NEQ, //DONE + OP_LESS, //DONE + OP_LEQ, //DONE + OP_GRTR, //DONE + OP_GEQ, //DONE + OP_SLESS, //DONE + OP_SLEQ, //DONE + OP_SGRTR, //DONE + OP_SGEQ, //DONE + OP_EQ_C_PRI, //DONE + OP_EQ_C_ALT, //DONE + OP_INC_PRI, //DONE + OP_INC_ALT, //DONE + OP_INC, //DONE + OP_INC_S, //DONE + OP_INC_I, //DONE + OP_DEC_PRI, //DONE + OP_DEC_ALT, //DONE + OP_DEC, //DONE + OP_DEC_S, //DONE + OP_DEC_I, //DONE + OP_MOVS, //DONE + OP_CMPS, //DONE + OP_FILL, //DONE + OP_HALT, //DONE + OP_BOUNDS, + OP_SYSREQ_PRI, + OP_SYSREQ_C, + OP_FILE, + OP_LINE, + OP_SYMBOL, + OP_SRANGE, + OP_JUMP_PRI, + OP_SWITCH, + OP_CASETBL, //DONE + OP_SWAP_PRI, //DONE + OP_SWAP_ALT, //DONE + OP_PUSH_ADR, //DONE + OP_NOP, //DONE + OP_SYSREQ_N, + OP_SYMTAG, + OP_BREAK, + OP_PUSH2_C, //DONE + OP_PUSH2, //DONE + OP_PUSH2_S, //DONE + OP_PUSH2_ADR, //DONE + OP_PUSH3_C, //DONE + OP_PUSH3, //DONE + OP_PUSH3_S, //DONE + OP_PUSH3_ADR, //DONE + OP_PUSH4_C, //DONE + OP_PUSH4, //DONE + OP_PUSH4_S, //DONE + OP_PUSH4_ADR, //DONE + OP_PUSH5_C, //DONE + OP_PUSH5, //DONE + OP_PUSH5_S, //DONE + OP_PUSH5_ADR, //DONE + OP_LOAD_BOTH, + OP_LOAD_S_BOTH, + OP_CONST, + OP_CONST_S, + /* ----- */ + OP_SYSREQ_D, + OP_SYSREQ_ND, + /* ----- */ + OP_HEAP_PRI, + OP_PUSH_HEAP_C, + OP_POP_HEAP_PRI, + /* ----- */ + OP_NUM_OPCODES +} OPCODE; + +extern int OpAdvTable[]; + +#endif //_INCLUDE_SOURCEPAWN_JIT_X86_OPCODE_INFO_H_ diff --git a/sourcepawn/vm/jit/x86/x86_macros.h b/sourcepawn/vm/jit/x86/x86_macros.h index ec373613..45ba5d8b 100644 --- a/sourcepawn/vm/jit/x86/x86_macros.h +++ b/sourcepawn/vm/jit/x86/x86_macros.h @@ -1,8 +1,6 @@ #ifndef _INCLUDE_JIT_X86_MACROS_H #define _INCLUDE_JIT_X86_MACROS_H -#include "..\jit_helpers.h" - //MOD R/M #define MOD_MEM_REG 0 #define MOD_DISP8 1 @@ -138,54 +136,54 @@ inline jit_uint8_t ia32_sib(jit_uint8_t mode, jit_uint8_t index, jit_uint8_t bas inline void IA32_Inc_Rm_Disp32(JitWriter *jit, jit_uint8_t reg, jit_int32_t disp) { - jit->write_ubyte(jit, IA32_INC_RM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, reg)); - jit->write_int32(jit, disp); + jit->write_ubyte(IA32_INC_RM); + jit->write_ubyte(ia32_modrm(MOD_DISP32, 0, reg)); + jit->write_int32(disp); } inline void IA32_Inc_Rm_Disp8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp) { - jit->write_ubyte(jit, IA32_INC_RM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, reg)); - jit->write_byte(jit, disp); + jit->write_ubyte(IA32_INC_RM); + jit->write_ubyte(ia32_modrm(MOD_DISP8, 0, reg)); + jit->write_byte(disp); } inline void IA32_Inc_Rm_Disp_Reg(JitWriter *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale) { - jit->write_ubyte(jit, IA32_INC_RM); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(scale, reg, base)); + jit->write_ubyte(IA32_INC_RM); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, 0, REG_SIB)); + jit->write_ubyte(ia32_sib(scale, reg, base)); } inline void IA32_Inc_Reg(JitWriter *jit, jit_uint8_t reg) { - jit->write_ubyte(jit, IA32_INC_REG+reg); + jit->write_ubyte(IA32_INC_REG+reg); } inline void IA32_Dec_Rm_Disp32(JitWriter *jit, jit_uint8_t reg, jit_int32_t disp) { - jit->write_ubyte(jit, IA32_DEC_RM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 1, reg)); - jit->write_int32(jit, disp); + jit->write_ubyte(IA32_DEC_RM); + jit->write_ubyte(ia32_modrm(MOD_DISP32, 1, reg)); + jit->write_int32(disp); } inline void IA32_Dec_Rm_Disp8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp) { - jit->write_ubyte(jit, IA32_DEC_RM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 1, reg)); - jit->write_byte(jit, disp); + jit->write_ubyte(IA32_DEC_RM); + jit->write_ubyte(ia32_modrm(MOD_DISP8, 1, reg)); + jit->write_byte(disp); } inline void IA32_Dec_Rm_Disp_Reg(JitWriter *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale) { - jit->write_ubyte(jit, IA32_DEC_RM); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 1, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(scale, reg, base)); + jit->write_ubyte(IA32_DEC_RM); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, 1, REG_SIB)); + jit->write_ubyte(ia32_sib(scale, reg, base)); } inline void IA32_Dec_Reg(JitWriter *jit, jit_uint8_t reg) { - jit->write_ubyte(jit, IA32_DEC_REG+reg); + jit->write_ubyte(IA32_DEC_REG+reg); } /**************** @@ -194,102 +192,102 @@ inline void IA32_Dec_Reg(JitWriter *jit, jit_uint8_t reg) inline void IA32_Xor_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t dest_mode) { - jit->write_ubyte(jit, IA32_XOR_RM_REG); - jit->write_ubyte(jit, ia32_modrm(dest_mode, src, dest)); + jit->write_ubyte(IA32_XOR_RM_REG); + jit->write_ubyte(ia32_modrm(dest_mode, src, dest)); } inline void IA32_Xor_Eax_Imm32(JitWriter *jit, jit_int32_t value) { - jit->write_ubyte(jit, IA32_XOR_EAX_IMM32); - jit->write_int32(jit, value); + jit->write_ubyte(IA32_XOR_EAX_IMM32); + jit->write_int32(value); } inline void IA32_Xor_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value) { - jit->write_ubyte(jit, IA32_XOR_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(mode, 6, reg)); - jit->write_int32(jit, value); + jit->write_ubyte(IA32_XOR_RM_IMM32); + jit->write_ubyte(ia32_modrm(mode, 6, reg)); + jit->write_int32(value); } inline void IA32_Xor_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value) { - jit->write_ubyte(jit, IA32_XOR_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 6, reg)); - jit->write_byte(jit, value); + jit->write_ubyte(IA32_XOR_RM_IMM8); + jit->write_ubyte(ia32_modrm(mode, 6, reg)); + jit->write_byte(value); } inline void IA32_Neg_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_NEG_RM); - jit->write_ubyte(jit, ia32_modrm(mode, 3, reg)); + jit->write_ubyte(IA32_NEG_RM); + jit->write_ubyte(ia32_modrm(mode, 3, reg)); } inline void IA32_Or_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_OR_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, src, dest)); + jit->write_ubyte(IA32_OR_RM_REG); + jit->write_ubyte(ia32_modrm(mode, src, dest)); } inline void IA32_And_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_AND_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, src, dest)); + jit->write_ubyte(IA32_AND_RM_REG); + jit->write_ubyte(ia32_modrm(mode, src, dest)); } inline void IA32_Not_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_NOT_RM); - jit->write_ubyte(jit, ia32_modrm(mode, 2, reg)); + jit->write_ubyte(IA32_NOT_RM); + jit->write_ubyte(ia32_modrm(mode, 2, reg)); } inline void IA32_Shr_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SHR_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 5, dest)); - jit->write_ubyte(jit, value); + jit->write_ubyte(IA32_SHR_RM_IMM8); + jit->write_ubyte(ia32_modrm(mode, 5, dest)); + jit->write_ubyte(value); } inline void IA32_Shl_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SHL_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 4, dest)); - jit->write_ubyte(jit, value); + jit->write_ubyte(IA32_SHL_RM_IMM8); + jit->write_ubyte(ia32_modrm(mode, 4, dest)); + jit->write_ubyte(value); } inline void IA32_Sar_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SAR_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 7, dest)); - jit->write_ubyte(jit, value); + jit->write_ubyte(IA32_SAR_RM_IMM8); + jit->write_ubyte(ia32_modrm(mode, 7, dest)); + jit->write_ubyte(value); } inline void IA32_Sar_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SAR_RM_CL); - jit->write_ubyte(jit, ia32_modrm(mode, 7, reg)); + jit->write_ubyte(IA32_SAR_RM_CL); + jit->write_ubyte(ia32_modrm(mode, 7, reg)); } inline void IA32_Shr_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SHR_RM_CL); - jit->write_ubyte(jit, ia32_modrm(mode, 5, reg)); + jit->write_ubyte(IA32_SHR_RM_CL); + jit->write_ubyte(ia32_modrm(mode, 5, reg)); } inline void IA32_Shl_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SHL_RM_CL); - jit->write_ubyte(jit, ia32_modrm(mode, 4, reg)); + jit->write_ubyte(IA32_SHL_RM_CL); + jit->write_ubyte(ia32_modrm(mode, 4, reg)); } inline void IA32_Xchg_Eax_Reg(JitWriter *jit, jit_uint8_t reg) { - jit->write_ubyte(jit, IA32_XCHG_EAX_REG+reg); + jit->write_ubyte(IA32_XCHG_EAX_REG+reg); } inline void IA32_Xchg_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_XCHG_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, src, dest)); + jit->write_ubyte(IA32_XCHG_RM_REG); + jit->write_ubyte(ia32_modrm(mode, src, dest)); } /********************** @@ -298,93 +296,93 @@ inline void IA32_Xchg_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, inline void IA32_Add_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_ADD_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, src, dest)); + jit->write_ubyte(IA32_ADD_RM_REG); + jit->write_ubyte(ia32_modrm(mode, src, dest)); } inline void IA32_Add_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t value, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_ADD_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 0, reg)); - jit->write_byte(jit, value); + jit->write_ubyte(IA32_ADD_RM_IMM8); + jit->write_ubyte(ia32_modrm(mode, 0, reg)); + jit->write_byte(value); } inline void IA32_Add_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t value, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_ADD_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(mode, 0, reg)); - jit->write_int32(jit, value); + jit->write_ubyte(IA32_ADD_RM_IMM32); + jit->write_ubyte(ia32_modrm(mode, 0, reg)); + jit->write_int32(value); } inline void IA32_Add_Eax_Imm32(JitWriter *jit, jit_int32_t value) { - jit->write_ubyte(jit, IA32_ADD_EAX_IMM32); - jit->write_int32(jit, value); + jit->write_ubyte(IA32_ADD_EAX_IMM32); + jit->write_int32(value); } inline void IA32_Sub_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SUB_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, src, dest)); + jit->write_ubyte(IA32_SUB_RM_REG); + jit->write_ubyte(ia32_modrm(mode, src, dest)); } inline void IA32_Sub_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t val, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SUB_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 5, reg)); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_SUB_RM_IMM8); + jit->write_ubyte(ia32_modrm(mode, 5, reg)); + jit->write_byte(val); } inline void IA32_Sub_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t val, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_SUB_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(mode, 5, reg)); - jit->write_int32(jit, val); + jit->write_ubyte(IA32_SUB_RM_IMM32); + jit->write_ubyte(ia32_modrm(mode, 5, reg)); + jit->write_int32(val); } inline void IA32_Div_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_DIV_RM); - jit->write_ubyte(jit, ia32_modrm(mode, 6, reg)); + jit->write_ubyte(IA32_DIV_RM); + jit->write_ubyte(ia32_modrm(mode, 6, reg)); } inline void IA32_IDiv_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_IDIV_RM); - jit->write_ubyte(jit, ia32_modrm(mode, 7, reg)); + jit->write_ubyte(IA32_IDIV_RM); + jit->write_ubyte(ia32_modrm(mode, 7, reg)); } inline void IA32_Mul_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_MUL_RM); - jit->write_ubyte(jit, ia32_modrm(mode, 4, reg)); + jit->write_ubyte(IA32_MUL_RM); + jit->write_ubyte(ia32_modrm(mode, 4, reg)); } inline void IA32_IMul_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_IMUL_RM); - jit->write_ubyte(jit, ia32_modrm(mode, 5, reg)); + jit->write_ubyte(IA32_IMUL_RM); + jit->write_ubyte(ia32_modrm(mode, 5, reg)); } inline void IA32_IMul_Reg_Imm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value) { - jit->write_ubyte(jit, IA32_IMUL_REG_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 0, reg)); - jit->write_byte(jit, value); + jit->write_ubyte(IA32_IMUL_REG_IMM8); + jit->write_ubyte(ia32_modrm(mode, 0, reg)); + jit->write_byte(value); } inline void IA32_IMul_Reg_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value) { - jit->write_ubyte(jit, IA32_IMUL_REG_IMM32); - jit->write_ubyte(jit, ia32_modrm(mode, 0, reg)); - jit->write_int32(jit, value); + jit->write_ubyte(IA32_IMUL_REG_IMM32); + jit->write_ubyte(ia32_modrm(mode, 0, reg)); + jit->write_int32(value); } inline void IA32_Add_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp) { - jit->write_ubyte(jit, IA32_ADD_RM_REG); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest)); - jit->write_byte(jit, disp); + jit->write_ubyte(IA32_ADD_RM_REG); + jit->write_ubyte(ia32_modrm(MOD_DISP8, src, dest)); + jit->write_byte(disp); } inline void IA32_Add_Rm_Imm8_Disp8(JitWriter *jit, @@ -392,10 +390,10 @@ inline void IA32_Add_Rm_Imm8_Disp8(JitWriter *jit, jit_int8_t val, jit_int8_t disp8) { - jit->write_ubyte(jit, IA32_ADD_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest)); - jit->write_byte(jit, disp8); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_ADD_RM_IMM8); + jit->write_ubyte(ia32_modrm(MOD_DISP8, 0, dest)); + jit->write_byte(disp8); + jit->write_byte(val); } inline void IA32_Add_Rm_Imm32_Disp8(JitWriter *jit, @@ -403,10 +401,10 @@ inline void IA32_Add_Rm_Imm32_Disp8(JitWriter *jit, jit_int32_t val, jit_int8_t disp8) { - jit->write_ubyte(jit, IA32_ADD_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest)); - jit->write_byte(jit, disp8); - jit->write_int32(jit, val); + jit->write_ubyte(IA32_ADD_RM_IMM32); + jit->write_ubyte(ia32_modrm(MOD_DISP8, 0, dest)); + jit->write_byte(disp8); + jit->write_int32(val); } inline void IA32_Add_Rm_Imm8_Disp32(JitWriter *jit, @@ -414,10 +412,10 @@ inline void IA32_Add_Rm_Imm8_Disp32(JitWriter *jit, jit_int8_t val, jit_int32_t disp32) { - jit->write_ubyte(jit, IA32_ADD_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest)); - jit->write_int32(jit, disp32); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_ADD_RM_IMM8); + jit->write_ubyte(ia32_modrm(MOD_DISP32, 0, dest)); + jit->write_int32(disp32); + jit->write_byte(val); } inline void IA32_Add_Rm_Imm8_Disp_Reg(JitWriter *jit, @@ -426,10 +424,10 @@ inline void IA32_Add_Rm_Imm8_Disp_Reg(JitWriter *jit, jit_uint8_t dest_scale, jit_int8_t val) { - jit->write_ubyte(jit, IA32_ADD_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base)); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_ADD_RM_IMM8); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, 0, REG_SIB)); + jit->write_ubyte(ia32_sib(dest_scale, dest_index, dest_base)); + jit->write_byte(val); } inline void IA32_Sub_Rm_Imm8_Disp8(JitWriter *jit, @@ -437,10 +435,10 @@ inline void IA32_Sub_Rm_Imm8_Disp8(JitWriter *jit, jit_int8_t val, jit_int8_t disp8) { - jit->write_ubyte(jit, IA32_SUB_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 5, dest)); - jit->write_byte(jit, disp8); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_SUB_RM_IMM8); + jit->write_ubyte(ia32_modrm(MOD_DISP8, 5, dest)); + jit->write_byte(disp8); + jit->write_byte(val); } inline void IA32_Sub_Rm_Imm8_Disp32(JitWriter *jit, @@ -448,10 +446,10 @@ inline void IA32_Sub_Rm_Imm8_Disp32(JitWriter *jit, jit_int8_t val, jit_int32_t disp32) { - jit->write_ubyte(jit, IA32_SUB_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 5, dest)); - jit->write_int32(jit, disp32); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_SUB_RM_IMM8); + jit->write_ubyte(ia32_modrm(MOD_DISP32, 5, dest)); + jit->write_int32(disp32); + jit->write_byte(val); } inline void IA32_Sub_Rm_Imm8_Disp_Reg(JitWriter *jit, @@ -460,10 +458,10 @@ inline void IA32_Sub_Rm_Imm8_Disp_Reg(JitWriter *jit, jit_uint8_t dest_scale, jit_int8_t val) { - jit->write_ubyte(jit, IA32_SUB_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 5, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base)); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_SUB_RM_IMM8); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, 5, REG_SIB)); + jit->write_ubyte(ia32_sib(dest_scale, dest_index, dest_base)); + jit->write_byte(val); } /** @@ -472,9 +470,9 @@ inline void IA32_Sub_Rm_Imm8_Disp_Reg(JitWriter *jit, inline void IA32_Lea_Reg_DispRegMult(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_uint8_t src_index, jit_uint8_t scale) { - jit->write_ubyte(jit, IA32_LEA_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(scale, src_index, src_base)); + jit->write_ubyte(IA32_LEA_REG_MEM); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, dest, REG_SIB)); + jit->write_ubyte(ia32_sib(scale, src_index, src_base)); } inline void IA32_Lea_Reg_DispRegMultImm8(JitWriter *jit, @@ -484,24 +482,24 @@ inline void IA32_Lea_Reg_DispRegMultImm8(JitWriter *jit, jit_uint8_t scale, jit_int8_t val) { - jit->write_ubyte(jit, IA32_LEA_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(scale, src_index, src_base)); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_LEA_REG_MEM); + jit->write_ubyte(ia32_modrm(MOD_DISP8, dest, REG_SIB)); + jit->write_ubyte(ia32_sib(scale, src_index, src_base)); + jit->write_byte(val); } inline void IA32_Lea_DispRegImm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int8_t val) { - jit->write_ubyte(jit, IA32_LEA_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, MOD_MEM_REG)); - jit->write_byte(jit, val); + jit->write_ubyte(IA32_LEA_REG_MEM); + jit->write_ubyte(ia32_modrm(MOD_DISP8, dest, MOD_MEM_REG)); + jit->write_byte(val); } inline void IA32_Lea_DispRegImm32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int32_t val) { - jit->write_ubyte(jit, IA32_LEA_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, MOD_MEM_REG)); - jit->write_int32(jit, val); + jit->write_ubyte(IA32_LEA_REG_MEM); + jit->write_ubyte(ia32_modrm(MOD_DISP32, dest, MOD_MEM_REG)); + jit->write_int32(val); } /** @@ -510,12 +508,12 @@ inline void IA32_Lea_DispRegImm32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t inline void IA32_Pop_Reg(JitWriter *jit, jit_uint8_t reg) { - jit->write_ubyte(jit, IA32_POP_REG+reg); + jit->write_ubyte(IA32_POP_REG+reg); } inline void IA32_Push_Reg(JitWriter *jit, jit_uint8_t reg) { - jit->write_ubyte(jit, IA32_PUSH_REG+reg); + jit->write_ubyte(IA32_PUSH_REG+reg); } /** @@ -524,22 +522,22 @@ inline void IA32_Push_Reg(JitWriter *jit, jit_uint8_t reg) inline void IA32_Mov_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_MOV_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(mode, dest, src)); + jit->write_ubyte(IA32_MOV_REG_MEM); + jit->write_ubyte(ia32_modrm(mode, dest, src)); } inline void IA32_Mov_Reg_Rm_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp) { - jit->write_ubyte(jit, IA32_MOV_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, src)); - jit->write_byte(jit, disp); + jit->write_ubyte(IA32_MOV_REG_MEM); + jit->write_ubyte(ia32_modrm(MOD_DISP8, dest, src)); + jit->write_byte(disp); } inline void IA32_Mov_Reg_Rm_Disp32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp) { - jit->write_ubyte(jit, IA32_MOV_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, src)); - jit->write_int32(jit, disp); + jit->write_ubyte(IA32_MOV_REG_MEM); + jit->write_ubyte(ia32_modrm(MOD_DISP32, dest, src)); + jit->write_int32(disp); } inline void IA32_Mov_Reg_Rm_Disp_Reg(JitWriter *jit, @@ -548,9 +546,9 @@ inline void IA32_Mov_Reg_Rm_Disp_Reg(JitWriter *jit, jit_uint8_t src_index, jit_uint8_t src_scale) { - jit->write_ubyte(jit, IA32_MOV_REG_MEM); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(src_scale, src_index, src_base)); + jit->write_ubyte(IA32_MOV_REG_MEM); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, dest, REG_SIB)); + jit->write_ubyte(ia32_sib(src_scale, src_index, src_base)); } /** @@ -559,22 +557,22 @@ inline void IA32_Mov_Reg_Rm_Disp_Reg(JitWriter *jit, inline void IA32_Mov_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_MOV_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, src, dest)); + jit->write_ubyte(IA32_MOV_RM_REG); + jit->write_ubyte(ia32_modrm(mode, src, dest)); } inline void IA32_Mov_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp) { - jit->write_ubyte(jit, IA32_MOV_RM_REG); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest)); - jit->write_byte(jit, disp); + jit->write_ubyte(IA32_MOV_RM_REG); + jit->write_ubyte(ia32_modrm(MOD_DISP8, src, dest)); + jit->write_byte(disp); } inline void IA32_Mov_Rm_Reg_Disp32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp) { - jit->write_ubyte(jit, IA32_MOV_RM_REG); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, src, dest)); - jit->write_int32(jit, disp); + jit->write_ubyte(IA32_MOV_RM_REG); + jit->write_ubyte(ia32_modrm(MOD_DISP32, src, dest)); + jit->write_int32(disp); } inline void IA32_Mov_Rm_Reg_Disp_Reg(JitWriter *jit, @@ -583,9 +581,9 @@ inline void IA32_Mov_Rm_Reg_Disp_Reg(JitWriter *jit, jit_uint8_t dest_scale, jit_uint8_t src) { - jit->write_ubyte(jit, IA32_MOV_RM_REG); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, src, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base)); + jit->write_ubyte(IA32_MOV_RM_REG); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, src, REG_SIB)); + jit->write_ubyte(ia32_sib(dest_scale, dest_index, dest_base)); } /** @@ -594,8 +592,8 @@ inline void IA32_Mov_Rm_Reg_Disp_Reg(JitWriter *jit, inline void IA32_Mov_Reg_Imm32(JitWriter *jit, jit_uint8_t dest, jit_int32_t num) { - jit->write_ubyte(jit, IA32_MOV_REG_IMM+dest); - jit->write_int32(jit, num); + jit->write_ubyte(IA32_MOV_REG_IMM+dest); + jit->write_int32(num); } inline void IA32_Mov_Rm_Imm32_Disp8(JitWriter *jit, @@ -603,10 +601,10 @@ inline void IA32_Mov_Rm_Imm32_Disp8(JitWriter *jit, jit_int32_t val, jit_int8_t disp8) { - jit->write_ubyte(jit, IA32_MOV_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest)); - jit->write_byte(jit, disp8); - jit->write_int32(jit, val); + jit->write_ubyte(IA32_MOV_RM_IMM32); + jit->write_ubyte(ia32_modrm(MOD_DISP8, 0, dest)); + jit->write_byte(disp8); + jit->write_int32(val); } inline void IA32_Mov_Rm_Imm32_Disp32(JitWriter *jit, @@ -614,10 +612,10 @@ inline void IA32_Mov_Rm_Imm32_Disp32(JitWriter *jit, jit_int32_t val, jit_int32_t disp32) { - jit->write_ubyte(jit, IA32_MOV_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest)); - jit->write_int32(jit, disp32); - jit->write_int32(jit, val); + jit->write_ubyte(IA32_MOV_RM_IMM32); + jit->write_ubyte(ia32_modrm(MOD_DISP32, 0, dest)); + jit->write_int32(disp32); + jit->write_int32(val); } inline void IA32_Mov_Rm_Imm32_Disp_Reg(JitWriter *jit, @@ -626,10 +624,10 @@ inline void IA32_Mov_Rm_Imm32_Disp_Reg(JitWriter *jit, jit_uint8_t dest_scale, jit_int32_t val) { - jit->write_ubyte(jit, IA32_MOV_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB)); - jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base)); - jit->write_int32(jit, val); + jit->write_ubyte(IA32_MOV_RM_IMM32); + jit->write_ubyte(ia32_modrm(MOD_MEM_REG, 0, REG_SIB)); + jit->write_ubyte(ia32_sib(dest_scale, dest_index, dest_base)); + jit->write_int32(val); } /** @@ -639,37 +637,37 @@ inline void IA32_Mov_Rm_Imm32_Disp_Reg(JitWriter *jit, inline jitoffs_t IA32_Jump_Cond_Imm8(JitWriter *jit, jit_uint8_t cond, jit_int8_t disp) { jitoffs_t ptr; - jit->write_ubyte(jit, IA32_JCC_IMM+cond); + jit->write_ubyte(IA32_JCC_IMM+cond); ptr = jit->jit_curpos(); - jit->write_byte(jit, disp); + jit->write_byte(disp); return ptr; } inline jitoffs_t IA32_Jump_Imm32(JitWriter *jit, jit_int32_t disp) { jitoffs_t ptr; - jit->write_ubyte(jit, IA32_JMP_IMM32); + jit->write_ubyte(IA32_JMP_IMM32); ptr = jit->jit_curpos(); - jit->write_int32(jit, disp); + jit->write_int32(disp); return ptr; } inline jitoffs_t IA32_Jump_Cond_Imm32(JitWriter *jit, jit_uint8_t cond, jit_int32_t disp) { jitoffs_t ptr; - jit->write_ubyte(jit, IA32_JCC_IMM32_1); - jit->write_ubyte(jit, IA32_JCC_IMM32_2+cond); + jit->write_ubyte(IA32_JCC_IMM32_1); + jit->write_ubyte(IA32_JCC_IMM32_2+cond); ptr = jit->jit_curpos(); - jit->write_int32(jit, disp); + jit->write_int32(disp); return ptr; } inline jitoffs_t IA32_Call_Imm32(JitWriter *jit, jit_int32_t disp) { jitoffs_t ptr; - jit->write_ubyte(jit, IA32_CALL_IMM32); + jit->write_ubyte(IA32_CALL_IMM32); ptr = jit->jit_curpos(); - jit->write_int32(jit, disp); + jit->write_int32(disp); return ptr; } @@ -681,92 +679,92 @@ inline void IA32_Write_Jump8(JitWriter *jit, jitoffs_t jmp, jitoffs_t target) jit_int8_t diff = (target - (jmp + 1)); //overwrite old value jit->outptr = jit->outbase + jmp; - jit->write_byte(jit, diff); + jit->write_byte(diff); //restore old ptr jit->outptr = oldptr; } inline void IA32_Send_Jump8_Here(JitWriter *jit, jitoffs_t jmp) { - jitoffs_t curptr = jit->jit_curpos(jit); + jitoffs_t curptr = jit->jit_curpos(); IA32_Write_Jump8(jit, jmp, curptr); } inline void IA32_Return(JitWriter *jit) { - jit->write_ubyte(jit, IA32_RET); + jit->write_ubyte(IA32_RET); } inline void IA32_Test_Rm_Reg(JitWriter *jit, jit_uint8_t reg1, jit_uint8_t reg2, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_TEST_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, reg2, reg1)); + jit->write_ubyte(IA32_TEST_RM_REG); + jit->write_ubyte(ia32_modrm(mode, reg2, reg1)); } inline void IA32_Cmp_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode) { - jit->write_ubyte(jit, IA32_CMP_RM_REG); - jit->write_ubyte(jit, ia32_modrm(mode, src, dest)); + jit->write_ubyte(IA32_CMP_RM_REG); + jit->write_ubyte(ia32_modrm(mode, src, dest)); } inline void IA32_Cmp_Rm_Imm8(JitWriter *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int8_t imm8) { - jit->write_ubyte(jit, IA32_CMP_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(mode, 7, rm)); - jit->write_byte(jit, imm8); + jit->write_ubyte(IA32_CMP_RM_IMM8); + jit->write_ubyte(ia32_modrm(mode, 7, rm)); + jit->write_byte(imm8); } inline void IA32_Cmp_Rm_Imm32(JitWriter *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int32_t imm32) { - jit->write_ubyte(jit, IA32_CMP_RM_IMM32); - jit->write_ubyte(jit, ia32_modrm(mode, 7, rm)); - jit->write_int32(jit, imm32); + jit->write_ubyte(IA32_CMP_RM_IMM32); + jit->write_ubyte(ia32_modrm(mode, 7, rm)); + jit->write_int32(imm32); } inline void IA32_Cmp_Rm_Disp8_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp, jit_int8_t imm8) { - jit->write_ubyte(jit, IA32_CMP_RM_IMM8); - jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 7, reg)); - jit->write_byte(jit, disp); - jit->write_byte(jit, imm8); + jit->write_ubyte(IA32_CMP_RM_IMM8); + jit->write_ubyte(ia32_modrm(MOD_DISP8, 7, reg)); + jit->write_byte(disp); + jit->write_byte(imm8); } inline void IA32_Cmp_Eax_Imm32(JitWriter *jit, jit_int32_t value) { - jit->write_ubyte(jit, IA32_CMP_EAX_IMM32); - jit->write_int32(jit, value); + jit->write_ubyte(IA32_CMP_EAX_IMM32); + jit->write_int32(value); } inline void IA32_SetCC_Rm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t cond) { - jit->write_ubyte(jit, IA32_SETCC_RM8_1); - jit->write_ubyte(jit, IA32_SETCC_RM8_2+cond); - jit->write_ubyte(jit, ia32_modrm(MOD_REG, 0, reg)); + jit->write_ubyte(IA32_SETCC_RM8_1); + jit->write_ubyte(IA32_SETCC_RM8_2+cond); + jit->write_ubyte(ia32_modrm(MOD_REG, 0, reg)); } inline void IA32_Rep(JitWriter *jit) { - jit->write_ubyte(jit, IA32_REP); + jit->write_ubyte(IA32_REP); } inline void IA32_Movsd(JitWriter *jit) { - jit->write_ubyte(jit, IA32_MOVSD); + jit->write_ubyte(IA32_MOVSD); } inline void IA32_Movsb(JitWriter *jit) { - jit->write_ubyte(jit, IA32_MOVSB); + jit->write_ubyte(IA32_MOVSB); } inline void IA32_Stosd(JitWriter *jit) { - jit->write_ubyte(jit, IA32_STOSD); + jit->write_ubyte(IA32_STOSD); } inline void IA32_Cld(JitWriter *jit) { - jit->write_ubyte(jit, IA32_CLD); + jit->write_ubyte(IA32_CLD); } #endif //_INCLUDE_JIT_X86_MACROS_H