organising stuff s bit
--HG-- extra : convert_revision : svn%3A39bc706e-5318-0410-9160-8a85361fbb7c/trunk%4092
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@ -247,8 +247,8 @@ void Write_Check_VerifyAddr(JitWriter *jit, jit_uint8_t reg, bool firstcall)
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jitoffs_t jmp1 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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jitoffs_t jmp1 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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IA32_Cmp_Reg_Rm_Disp8(jit, reg, AMX_REG_INFO, AMX_INFO_HEAP);
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IA32_Cmp_Reg_Rm_Disp8(jit, reg, AMX_REG_INFO, AMX_INFO_HEAP);
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jitoffs_t jmp2 = IA32_Jump_Cond_Imm8(jit, CC_B, 0);
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jitoffs_t jmp2 = IA32_Jump_Cond_Imm8(jit, CC_B, 0);
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IA32_Lea_Reg_DispRegMult(jit, REG_ECX, reg, REG_EDI, NOSCALE);
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IA32_Lea_Reg_DispRegMult(jit, AMX_REG_TMP, reg, AMX_REG_DAT, NOSCALE);
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IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
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IA32_Cmp_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_STK, MOD_REG);
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jitoffs_t jmp3 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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jitoffs_t jmp3 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
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IA32_Send_Jump8_Here(jit, jmp1);
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IA32_Send_Jump8_Here(jit, jmp1);
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Write_Error(jit, SP_ERR_MEMACCESS);
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Write_Error(jit, SP_ERR_MEMACCESS);
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@ -328,15 +328,15 @@ void Write_CheckMargin_Heap(JitWriter *jit)
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//mov ecx, [esi+hea]
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//mov ecx, [esi+hea]
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//cmp ecx, [esi+hlw]
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//cmp ecx, [esi+hlw]
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//jl :error_heapmin
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//jl :error_heapmin
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IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, AMX_REG_INFO, AMX_INFO_HEAP);
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IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAP);
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IA32_Cmp_Reg_Rm_Disp8(jit, REG_ECX, AMX_REG_INFO, AMX_INFO_HEAPLOW);
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IA32_Cmp_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAPLOW);
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jitoffs_t hm = IA32_Jump_Cond_Imm8(jit, CC_L, 0);
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jitoffs_t hm = IA32_Jump_Cond_Imm8(jit, CC_L, 0);
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//lea ecx, [edi+ecx+STACK_MARGIN]
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//lea ecx, [edi+ecx+STACK_MARGIN]
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//cmp ecx, ebp
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//cmp ecx, ebp
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// jg :error_heaplow
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// jg :error_heaplow
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//OR
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//OR
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// ret
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// ret
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IA32_Lea_Reg_DispRegMultImm8(jit, REG_ECX, AMX_REG_DAT, REG_ECX, NOSCALE, STACK_MARGIN);
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IA32_Lea_Reg_DispRegMultImm8(jit, AMX_REG_TMP, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, STACK_MARGIN);
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IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
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IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
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jitoffs_t hl = IA32_Jump_Cond_Imm8(jit, CC_G, 0);
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jitoffs_t hl = IA32_Jump_Cond_Imm8(jit, CC_G, 0);
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jitoffs_t cont;
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jitoffs_t cont;
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@ -378,7 +378,6 @@ void Write_CheckMargin_Stack(JitWriter *jit)
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IA32_Send_Jump8_Here(jit, jmp);
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IA32_Send_Jump8_Here(jit, jmp);
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}
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}
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void Macro_PushN_Addr(JitWriter *jit, int i)
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void Macro_PushN_Addr(JitWriter *jit, int i)
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{
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{
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//push eax
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//push eax
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@ -643,4 +642,3 @@ JITX86::JITX86()
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OpAdvTable[OP_SYSREQ_ND] = -3;
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OpAdvTable[OP_SYSREQ_ND] = -3;
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OpAdvTable[OP_PUSH_R] = -3;
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OpAdvTable[OP_PUSH_R] = -3;
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}
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}
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@ -250,7 +250,7 @@ inline void IA32_And_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, j
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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}
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}
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inline void IA32_And_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint32_t c)
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inline void IA32_And_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t c)
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{
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{
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if (reg == REG_EAX)
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if (reg == REG_EAX)
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{
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{
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@ -259,7 +259,7 @@ inline void IA32_And_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint32_t c)
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jit->write_ubyte(IA32_AND_RM_IMM32);
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jit->write_ubyte(IA32_AND_RM_IMM32);
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jit->write_ubyte(ia32_modrm(MOD_REG, 4, reg));
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jit->write_ubyte(ia32_modrm(MOD_REG, 4, reg));
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}
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}
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jit->write_uint32(c);
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jit->write_int32(c);
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}
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}
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inline void IA32_Not_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
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inline void IA32_Not_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
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@ -322,6 +322,12 @@ inline void IA32_Add_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, j
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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}
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}
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inline void IA32_Add_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
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{
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jit->write_ubyte(IA32_ADD_REG_RM);
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jit->write_ubyte(ia32_modrm(mode, dest, src));
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}
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inline void IA32_Add_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t value, jit_uint8_t mode)
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inline void IA32_Add_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t value, jit_uint8_t mode)
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{
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{
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jit->write_ubyte(IA32_ADD_RM_IMM8);
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jit->write_ubyte(IA32_ADD_RM_IMM8);
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@ -348,12 +354,6 @@ inline void IA32_Sub_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, j
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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}
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}
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inline void IA32_Sbb_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
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{
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jit->write_ubyte(IA32_SBB_RM_REG);
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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}
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inline void IA32_Sub_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
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inline void IA32_Sub_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
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{
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{
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jit->write_ubyte(IA32_SUB_REG_RM);
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jit->write_ubyte(IA32_SUB_REG_RM);
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@ -374,6 +374,12 @@ inline void IA32_Sub_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t val,
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jit->write_int32(val);
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jit->write_int32(val);
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}
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}
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inline void IA32_Sbb_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
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{
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jit->write_ubyte(IA32_SBB_RM_REG);
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jit->write_ubyte(ia32_modrm(mode, src, dest));
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}
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inline void IA32_Sbb_Eax_Imm32(JitWriter *jit, jit_int32_t value)
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inline void IA32_Sbb_Eax_Imm32(JitWriter *jit, jit_int32_t value)
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{
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{
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jit->write_ubyte(IA32_SBB_EAX_IMM32);
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jit->write_ubyte(IA32_SBB_EAX_IMM32);
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@ -425,12 +431,6 @@ inline void IA32_Add_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t
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jit->write_byte(disp);
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jit->write_byte(disp);
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}
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}
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inline void IA32_Add_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
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{
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jit->write_ubyte(IA32_ADD_REG_RM);
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jit->write_ubyte(ia32_modrm(mode, dest, src));
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}
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inline void IA32_Add_Reg_Rm_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
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inline void IA32_Add_Reg_Rm_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
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{
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{
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jit->write_ubyte(IA32_ADD_REG_RM);
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jit->write_ubyte(IA32_ADD_REG_RM);
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