diff --git a/sourcepawn/vm/jit/x86/jit_x86.cpp b/sourcepawn/vm/jit/x86/jit_x86.cpp
index ba292178..4a9fd689 100644
--- a/sourcepawn/vm/jit/x86/jit_x86.cpp
+++ b/sourcepawn/vm/jit/x86/jit_x86.cpp
@@ -18,7 +18,6 @@ inline void WriteOp_Move_Alt(JitWriter *jit)
 
 inline void WriteOp_Xchg(JitWriter *jit)
 {
-	/* :TODO: change this? XCHG is bad */
 	//xchg eax, edx
 	IA32_Xchg_Eax_Reg(jit, AMX_REG_ALT);
 }
@@ -757,10 +756,10 @@ inline void WriteOp_Idxaddr(JitWriter *jit)
 
 inline void WriteOp_Idxaddr_B(JitWriter *jit)
 {
-	cell_t val = jit->read_cell();
 	//shl eax, <val>
 	//add eax, edx
-	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, val, MOD_REG);
+	cell_t val = jit->read_cell();
+	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
 	IA32_Add_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
 }
 
@@ -850,14 +849,26 @@ inline void WriteOp_Pop_Alt(JitWriter *jit)
 
 inline void WriteOp_Swap_Pri(JitWriter *jit)
 {
-	//xchg [ebp], eax // :TODO: change this xchg for another thing (SLOW!! :O )
-	IA32_Xchg_Rm_Reg(jit, AMX_REG_STK, AMX_REG_PRI, MOD_MEM_REG);
+	//add [ebp], eax
+	//sub eax, [ebp]
+	//add [ebp], eax
+	//neg eax
+	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_PRI, MOD_MEM_REG);
+	IA32_Sub_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG);
+	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_PRI, MOD_MEM_REG);
+	IA32_Neg_Rm(jit, AMX_REG_PRI, MOD_REG);
 }
 
 inline void WriteOp_Swap_Alt(JitWriter *jit)
 {
-	//xchg [ebp], edx // :TODO: change this xchg for another thing
-	IA32_Xchg_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG);
+	//add [ebp], edx
+	//sub edx, [ebp]
+	//add [ebp], edx
+	//neg edx
+	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG);
+	IA32_Sub_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_STK, MOD_MEM_REG);
+	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG);
+	IA32_Neg_Rm(jit, AMX_REG_ALT, MOD_REG);
 }
 
 inline void WriteOp_PushAddr(JitWriter *jit)
@@ -1087,7 +1098,7 @@ inline void WriteOp_Lidx_B(JitWriter *jit)
 	//shl eax, <val>
 	//add eax, edx
 	//mov eax, [edi+eax]
-	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, val, MOD_REG);
+	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
 	IA32_Add_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
 	Write_Check_VerifyAddr(jit, AMX_REG_PRI, false);
 	IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
diff --git a/sourcepawn/vm/jit/x86/x86_macros.h b/sourcepawn/vm/jit/x86/x86_macros.h
index d12b86df..835a4cd8 100644
--- a/sourcepawn/vm/jit/x86/x86_macros.h
+++ b/sourcepawn/vm/jit/x86/x86_macros.h
@@ -60,6 +60,7 @@
 #define IA32_ADD_RM_IMM8		0x83	// encoding is /0
 #define IA32_ADD_EAX_IMM32		0x05	// no extra encoding
 #define IA32_SUB_RM_REG			0x29	// encoding is /r
+#define IA32_SUB_REG_RM			0x2B	// encoding is /r
 #define IA32_SUB_RM_IMM8		0x83	// encoding is /5 <imm8>
 #define IA32_SUB_RM_IMM32		0x81	// encoding is /5 <imm32>
 #define IA32_JMP_IMM32			0xE9	// encoding is imm32
@@ -106,7 +107,6 @@
 #define IA32_SETCC_RM8_1		0x0F	// opcode part 1
 #define IA32_SETCC_RM8_2		0x90	// encoding is +cc /0 (8bits)
 #define IA32_XCHG_EAX_REG		0x90	// encoding is +r
-#define IA32_XCHG_RM_REG		0x87	// encoding is /r
 #define IA32_LEA_REG_MEM		0x8D	// encoding is /r
 #define IA32_POP_REG			0x58	// encoding is +r
 #define IA32_PUSH_REG			0x50	// encoding is +r
@@ -305,12 +305,6 @@ inline void IA32_Xchg_Eax_Reg(JitWriter *jit, jit_uint8_t reg)
 	jit->write_ubyte(IA32_XCHG_EAX_REG+reg);
 }
 
-inline void IA32_Xchg_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
-{
-	jit->write_ubyte(IA32_XCHG_RM_REG);
-	jit->write_ubyte(ia32_modrm(mode, src, dest));
-}
-
 /**********************
  * ARITHMETIC (BASIC) *
  **********************/
@@ -347,6 +341,12 @@ inline void IA32_Sub_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, j
 	jit->write_ubyte(ia32_modrm(mode, src, dest));
 }
 
+inline void IA32_Sub_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
+{
+	jit->write_ubyte(IA32_SUB_REG_RM);
+	jit->write_ubyte(ia32_modrm(mode, dest, src));
+}
+
 inline void IA32_Sub_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t val, jit_uint8_t mode)
 {
 	jit->write_ubyte(IA32_SUB_RM_IMM8);