initial recleaning of this mess, preparing for merge of JIT proper
--HG-- extra : convert_revision : svn%3A39bc706e-5318-0410-9160-8a85361fbb7c/trunk%4074
This commit is contained in:
David Anderson
parent
302636d5e0
commit
45aa735928
@ -74,7 +74,11 @@ namespace SourcePawn
|
||||
virtual void BaseFree(void *memory) =0;
|
||||
};
|
||||
|
||||
class ICompilation;
|
||||
class ICompilation
|
||||
{
|
||||
public:
|
||||
virtual ~ICompilation() { };
|
||||
};
|
||||
|
||||
class IVirtualMachine
|
||||
{
|
||||
@ -107,9 +111,17 @@ namespace SourcePawn
|
||||
* Note: This will free the ICompilation pointer.
|
||||
*
|
||||
* @param co Compilation pointer.
|
||||
* @param err Filled with error code on exit.
|
||||
* @return New plugin context.
|
||||
*/
|
||||
virtual IPluginContext *CompileToContext(ICompilation *co) =0;
|
||||
virtual IPluginContext *CompileToContext(ICompilation *co, int *err) =0;
|
||||
|
||||
/**
|
||||
* Aborts a compilation and frees the ICompilation pointer.
|
||||
*
|
||||
* @param co Compilation pointer.
|
||||
*/
|
||||
virtual void AbortCompilation(ICompilation *co) =0;
|
||||
|
||||
/**
|
||||
* Frees any internal variable usage on a context.
|
||||
|
||||
14
sourcepawn/include/sp_vm_base.h
Normal file
14
sourcepawn/include/sp_vm_base.h
Normal file
@ -0,0 +1,14 @@
|
||||
#ifndef _INCLUDE_SOURCEPAWN_VM_BASE_H_
|
||||
#define _INCLUDE_SOURCEPAWN_VM_BASE_H_
|
||||
|
||||
#include <sp_vm_api.h>
|
||||
|
||||
#if defined WIN32
|
||||
#define EXPORT_LINK extern "C" __declspec(dllexport)
|
||||
#else if defined __GNUC__
|
||||
#define EXPORT_LINK extern "C" __attribute__((visibility("default")))
|
||||
#endif
|
||||
|
||||
typedef SourcePawn::IVirtualMachine *(*SP_GETVM_FUNC)(SourcePawn::ISourcePawnEngine *);
|
||||
|
||||
#endif //_INCLUDE_SOURCEPAWN_VM_BASE_H_
|
||||
@ -20,6 +20,7 @@ typedef int32_t cell_t;
|
||||
#define SP_ERR_NATIVE_PENDING 8 /* A script tried to exec an unbound native */
|
||||
#define SP_ERR_STACKERR 9 /* Stack/Heap collision */
|
||||
#define SP_ERR_NOTDEBUGGING 10 /* Debug mode was not on or debug section not found */
|
||||
#define SP_ERR_INVALID_INSTRUCTION 11 /* Invalid instruction was encountered */
|
||||
|
||||
/**********************************************
|
||||
*** The following structures are reference structures.
|
||||
|
||||
@ -1,100 +0,0 @@
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
#include "jit_helpers.h"
|
||||
|
||||
cell_t jit_read_cell(jitinfo_t *jit)
|
||||
{
|
||||
cell_t val = *(jit->inptr);
|
||||
jit->inptr++;
|
||||
return val;
|
||||
}
|
||||
|
||||
cell_t jit_read_cell_null(jitinfo_t *jit)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
cell_t *jit_read_cellptr(jitinfo_t *jit)
|
||||
{
|
||||
cell_t *val = *(cell_t **)(jit->inptr);
|
||||
jit->inptr++;
|
||||
return val;
|
||||
}
|
||||
|
||||
cell_t *jit_read_cellptr_null(jitinfo_t *jit)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void jit_write_ubyte(jitinfo_t *jit, jit_uint8_t c)
|
||||
{
|
||||
*(jit->outptr++) = c;
|
||||
}
|
||||
|
||||
void jit_write_ubyte_null(jitinfo_t *jit, jit_uint8_t c)
|
||||
{
|
||||
jit->outptr++;
|
||||
}
|
||||
|
||||
void jit_write_byte(jitinfo_t *jit, jit_int8_t c)
|
||||
{
|
||||
*(jit->outptr++) = c;
|
||||
}
|
||||
|
||||
void jit_write_byte_null(jitinfo_t *jit, jit_int8_t c)
|
||||
{
|
||||
jit->outptr++;
|
||||
}
|
||||
|
||||
void jit_write_int32(jitinfo_t *jit, jit_int32_t c)
|
||||
{
|
||||
jit_int32_t *ptr = (jit_int32_t *)jit->outptr;
|
||||
*ptr = c;
|
||||
jit->outptr += sizeof(jit_int32_t);
|
||||
}
|
||||
|
||||
void jit_write_int32_null(jitinfo_t *jit, jit_int32_t c)
|
||||
{
|
||||
jit->outptr += sizeof(jit_int32_t);
|
||||
}
|
||||
|
||||
void jit_write_int64(jitinfo_t *jit, jit_int64_t c)
|
||||
{
|
||||
jit_int64_t *ptr = (jit_int64_t *)jit->outptr;
|
||||
*ptr = c;
|
||||
jit->outptr += sizeof(jit_int64_t);
|
||||
}
|
||||
|
||||
void jit_write_int64_null(jitinfo_t *jit, jit_int64_t c)
|
||||
{
|
||||
jit->outptr += sizeof(jit_int64_t);
|
||||
}
|
||||
|
||||
jitoffs_t jit_curpos(jitinfo_t *jit)
|
||||
{
|
||||
return (jit->outptr - jit->outbase);
|
||||
}
|
||||
|
||||
jitwritefuncs_t g_write_funcs =
|
||||
{
|
||||
jit_read_cell,
|
||||
jit_read_cellptr,
|
||||
jit_write_ubyte,
|
||||
jit_write_byte,
|
||||
jit_write_int32,
|
||||
jit_write_int64,
|
||||
jit_curpos
|
||||
};
|
||||
|
||||
jitwritefuncs_t g_write_null_funcs =
|
||||
{
|
||||
jit_read_cell_null,
|
||||
jit_read_cellptr_null,
|
||||
jit_write_ubyte_null,
|
||||
jit_write_byte_null,
|
||||
jit_write_int32_null,
|
||||
jit_write_int64_null,
|
||||
jit_curpos
|
||||
};
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
#ifndef _INCLUDE_AMX_JIT_H
|
||||
#define _INCLUDE_AMX_JIT_H
|
||||
#ifndef _INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
|
||||
#define _INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
|
||||
|
||||
#include <sp_vm_types.h>
|
||||
|
||||
@ -23,27 +23,53 @@ typedef unsigned __int64 jit_uint64_t;
|
||||
typedef char * jitcode_t;
|
||||
typedef unsigned int jitoffs_t;
|
||||
|
||||
//functions for writing to a JIT
|
||||
typedef struct tagJITWRITEFUNCS
|
||||
class JitWriter
|
||||
{
|
||||
//Reading from the input stream
|
||||
cell_t (*read_cell)(struct tagJITINFO *);
|
||||
cell_t *(*read_cellptr)(struct tagJITINFO *);
|
||||
//Writing to the output stream
|
||||
void (*write_ubyte)(struct tagJITINFO *, jit_uint8_t);
|
||||
void (*write_byte)(struct tagJITINFO *, jit_int8_t);
|
||||
void (*write_int32)(struct tagJITINFO *, jit_int32_t);
|
||||
void (*write_int64)(struct tagJITINFO *, jit_int64_t);
|
||||
//helpers
|
||||
jitoffs_t (*jit_curpos)(struct tagJITINFO *);
|
||||
} jitwritefuncs_t;
|
||||
|
||||
typedef struct tagJITINFO
|
||||
{
|
||||
jitwritefuncs_t wrfuncs;
|
||||
public:
|
||||
inline cell_t read_cell()
|
||||
{
|
||||
cell_t val = *(inptr);
|
||||
inptr++;
|
||||
return val;
|
||||
}
|
||||
inline cell_t read_cellptr()
|
||||
{
|
||||
cell_t *val = *(cell_t **)(inptr);
|
||||
inptr++;
|
||||
return val;
|
||||
}
|
||||
inline void write_ubyte(jit_uint8_t c)
|
||||
{
|
||||
if (outptr)
|
||||
{
|
||||
*outptr = c;
|
||||
}
|
||||
outptr++;
|
||||
}
|
||||
inline void write_byte(jit_int8_t c)
|
||||
{
|
||||
if (outptr)
|
||||
{
|
||||
*outptr = c;
|
||||
}
|
||||
outptr++;
|
||||
}
|
||||
inline void write_int32(jit_int32_t c)
|
||||
{
|
||||
if (outptr)
|
||||
{
|
||||
*(jit_int32_t *)ptr = c;
|
||||
}
|
||||
outptr += sizeof(jit_int32_t);
|
||||
}
|
||||
inline jitoffs_t jit_curpos()
|
||||
{
|
||||
return (outptr - outbase);
|
||||
}
|
||||
public:
|
||||
cell_t *inptr; /* input pointer */
|
||||
jitcode_t outbase; /* output pointer */
|
||||
jitcode_t outptr; /* output base */
|
||||
} jitinfo_t;
|
||||
};
|
||||
|
||||
#endif //_INCLUDE_AMX_JIT_H
|
||||
#endif //_INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
|
||||
|
||||
@ -2,6 +2,255 @@
|
||||
#include <stdlib.h>
|
||||
#include "jit_x86.h"
|
||||
|
||||
int OpAdvTable[OP_NUM_OPCODES];
|
||||
|
||||
JITX86::JITX86()
|
||||
{
|
||||
memset(OpAdvTable, -1, sizeof(OpAdvTable));
|
||||
|
||||
/* instructions with 5 parameters */
|
||||
OpAdvTable[OP_PUSH5_C] = sizeof(cell_t)*5;
|
||||
OpAdvTable[OP_PUSH5] = sizeof(cell_t)*5;
|
||||
OpAdvTable[OP_PUSH5_S] = sizeof(cell_t)*5;
|
||||
OpAdvTable[OP_PUSH5_ADR] = sizeof(cell_t)*5;
|
||||
|
||||
/* instructions with 4 parameters */
|
||||
OpAdvTable[OP_PUSH4_C] = sizeof(cell_t)*4;
|
||||
OpAdvTable[OP_PUSH4] = sizeof(cell_t)*4;
|
||||
OpAdvTable[OP_PUSH4_S] = sizeof(cell_t)*4;
|
||||
OpAdvTable[OP_PUSH4_ADR] = sizeof(cell_t)*4;
|
||||
|
||||
/* instructions with 3 parameters */
|
||||
OpAdvTable[OP_PUSH3_C] = sizeof(cell_t)*3;
|
||||
OpAdvTable[OP_PUSH3] = sizeof(cell_t)*3;
|
||||
OpAdvTable[OP_PUSH3_S] = sizeof(cell_t)*3;
|
||||
OpAdvTable[OP_PUSH3_ADR] = sizeof(cell_t)*3;
|
||||
|
||||
/* instructions with 2 parameters */
|
||||
OpAdvTable[OP_PUSH2_C] = sizeof(cell_t)*2;
|
||||
OpAdvTable[OP_PUSH2] = sizeof(cell_t)*2;
|
||||
OpAdvTable[OP_PUSH2_S] = sizeof(cell_t)*2;
|
||||
OpAdvTable[OP_PUSH2_ADR] = sizeof(cell_t)*2;
|
||||
OpAdvTable[OP_LOAD_BOTH] = sizeof(cell_t)*2;
|
||||
OpAdvTable[OP_LOAD_S_BOTH] = sizeof(cell_t)*2;
|
||||
OpAdvTable[OP_CONST] = sizeof(cell_t)*2;
|
||||
OpAdvTable[OP_CONST_S] = sizeof(cell_t)*2;
|
||||
|
||||
/* instructions with 1 parameter */
|
||||
OpAdvTable[OP_LOAD_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LOAD_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LOAD_S_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LOAD_S_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LREF_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LREF_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LREF_S_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LREF_S_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LODB_I] = sizeof(cell_t);
|
||||
OpAdvTable[OP_CONST_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_CONST_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_ADDR_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_ADDR_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_STOR_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_STOR_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_STOR_S_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_STOR_S_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SREF_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SREF_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SREF_S_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SREF_S_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_STRB_I] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LIDX_B] = sizeof(cell_t);
|
||||
OpAdvTable[OP_IDXADDR_B] = sizeof(cell_t);
|
||||
OpAdvTable[OP_ALIGN_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_ALIGN_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_LCTRL] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SCTRL] = sizeof(cell_t);
|
||||
OpAdvTable[OP_PUSH_R] = sizeof(cell_t);
|
||||
OpAdvTable[OP_PUSH_C] = sizeof(cell_t);
|
||||
OpAdvTable[OP_PUSH] = sizeof(cell_t);
|
||||
OpAdvTable[OP_PUSH_S] = sizeof(cell_t);
|
||||
OpAdvTable[OP_STACK] = sizeof(cell_t);
|
||||
OpAdvTable[OP_HEAP] = sizeof(cell_t);
|
||||
OpAdvTable[OP_JREL] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SHL_C_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SHL_C_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SHR_C_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SHR_C_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_ADD_C] = sizeof(cell_t);
|
||||
OpAdvTable[OP_SMUL_C] = sizeof(cell_t);
|
||||
OpAdvTable[OP_ZERO] = sizeof(cell_t);
|
||||
OpAdvTable[OP_ZERO_S] = sizeof(cell_t);
|
||||
OpAdvTable[OP_EQ_C_PRI] = sizeof(cell_t);
|
||||
OpAdvTable[OP_EQ_C_ALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_INC] = sizeof(cell_t);
|
||||
OpAdvTable[OP_INC_S] = sizeof(cell_t);
|
||||
OpAdvTable[OP_DEC] = sizeof(cell_t);
|
||||
OpAdvTable[OP_DEC_S] = sizeof(cell_t);
|
||||
OpAdvTable[OP_MOVS] = sizeof(cell_t);
|
||||
OpAdvTable[OP_CMPS] = sizeof(cell_t);
|
||||
OpAdvTable[OP_FILL] = sizeof(cell_t);
|
||||
OpAdvTable[OP_HALT] = sizeof(cell_t);
|
||||
OpAdvTable[OP_BOUNDS] = sizeof(cell_t);
|
||||
OpAdvTable[OP_PUSH_ADR] = sizeof(cell_t);
|
||||
|
||||
/* instructions with 0 parameters */
|
||||
OpAdvTable[OP_LOAD_I] = 0;
|
||||
OpAdvTable[OP_STOR_I] = 0;
|
||||
OpAdvTable[OP_LIDX] = 0;
|
||||
OpAdvTable[OP_IDXADDR] = 0;
|
||||
OpAdvTable[OP_MOVE_PRI] = 0;
|
||||
OpAdvTable[OP_MOVE_ALT] = 0;
|
||||
OpAdvTable[OP_XCHG] = 0;
|
||||
OpAdvTable[OP_PUSH_PRI] = 0;
|
||||
OpAdvTable[OP_PUSH_ALT] = 0;
|
||||
OpAdvTable[OP_POP_PRI] = 0;
|
||||
OpAdvTable[OP_POP_ALT] = 0;
|
||||
OpAdvTable[OP_PROC] = 0;
|
||||
OpAdvTable[OP_RET] = 0;
|
||||
OpAdvTable[OP_RETN] = 0;
|
||||
OpAdvTable[OP_CALL_PRI] = 0;
|
||||
OpAdvTable[OP_SHL] = 0;
|
||||
OpAdvTable[OP_SHR] = 0;
|
||||
OpAdvTable[OP_SSHR] = 0;
|
||||
OpAdvTable[OP_SMUL] = 0;
|
||||
OpAdvTable[OP_SDIV] = 0;
|
||||
OpAdvTable[OP_SDIV_ALT] = 0;
|
||||
OpAdvTable[OP_UMUL] = 0;
|
||||
OpAdvTable[OP_UDIV] = 0;
|
||||
OpAdvTable[OP_UDIV_ALT] = 0;
|
||||
OpAdvTable[OP_ADD] = 0;
|
||||
OpAdvTable[OP_SUB] = 0;
|
||||
OpAdvTable[OP_SUB_ALT] = 0;
|
||||
OpAdvTable[OP_AND] = 0;
|
||||
OpAdvTable[OP_OR] = 0;
|
||||
OpAdvTable[OP_XOR] = 0;
|
||||
OpAdvTable[OP_NOT] = 0;
|
||||
OpAdvTable[OP_NEG] = 0;
|
||||
OpAdvTable[OP_INVERT] = 0;
|
||||
OpAdvTable[OP_ZERO_PRI] = 0;
|
||||
OpAdvTable[OP_ZERO_ALT] = 0;
|
||||
OpAdvTable[OP_SIGN_PRI] = 0;
|
||||
OpAdvTable[OP_SIGN_ALT] = 0;
|
||||
OpAdvTable[OP_EQ] = 0;
|
||||
OpAdvTable[OP_NEQ] = 0;
|
||||
OpAdvTable[OP_LESS] = 0;
|
||||
OpAdvTable[OP_LEQ] = 0;
|
||||
OpAdvTable[OP_GRTR] = 0;
|
||||
OpAdvTable[OP_GEQ] = 0;
|
||||
OpAdvTable[OP_SLESS] = 0;
|
||||
OpAdvTable[OP_SLEQ] = 0;
|
||||
OpAdvTable[OP_SGRTR] = 0;
|
||||
OpAdvTable[OP_SGEQ] = 0;
|
||||
OpAdvTable[OP_INC_PRI] = 0;
|
||||
OpAdvTable[OP_INC_ALT] = 0;
|
||||
OpAdvTable[OP_INC_I] = 0;
|
||||
OpAdvTable[OP_DEC_PRI] = 0;
|
||||
OpAdvTable[OP_DEC_ALT] = 0;
|
||||
OpAdvTable[OP_DEC_I] = 0;
|
||||
OpAdvTable[OP_JUMP_PRI] = 0;
|
||||
OpAdvTable[OP_SWAP_PRI] = 0;
|
||||
OpAdvTable[OP_SWAP_ALT] = 0;
|
||||
OpAdvTable[OP_NOP] = 0;
|
||||
OpAdvTable[OP_BREAK] = 0;
|
||||
|
||||
/* opcodes that need relocation */
|
||||
OpAdvTable[OP_CALL] = -2;
|
||||
OpAdvTable[OP_JUMP] = -2;
|
||||
OpAdvTable[OP_JZER] = -2;
|
||||
OpAdvTable[OP_JNZ] = -2;
|
||||
OpAdvTable[OP_JEQ] = -2;
|
||||
OpAdvTable[OP_JNEQ] = -2;
|
||||
OpAdvTable[OP_JLESS] = -2;
|
||||
OpAdvTable[OP_JLEQ] = -2;
|
||||
OpAdvTable[OP_JGRTR] = -2;
|
||||
OpAdvTable[OP_JGEQ] = -2;
|
||||
OpAdvTable[OP_JSLESS] = -2;
|
||||
OpAdvTable[OP_JSLEQ] = -2;
|
||||
OpAdvTable[OP_JSGRTR] = -2;
|
||||
OpAdvTable[OP_JSGEQ] = -2;
|
||||
OpAdvTable[OP_SWITCH] = -2;
|
||||
|
||||
/* opcodes that are totally invalid */
|
||||
OpAdvTable[OP_FILE] = -3;
|
||||
OpAdvTable[OP_SYMBOL] = -3;
|
||||
OpAdvTable[OP_LINE] = -3;
|
||||
OpAdvTable[OP_SRANGE] = -3;
|
||||
OpAdvTable[OP_SYMTAG] = -3;
|
||||
OpAdvTable[OP_SYSREQ_D] = -3;
|
||||
OpAdvTable[OP_SYSREQ_ND] = -3;
|
||||
}
|
||||
|
||||
IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
|
||||
{
|
||||
CompData *data = (CompData *)co;
|
||||
sp_plugin_t *plugin = data->plugin;
|
||||
|
||||
/* The first phase is to browse */
|
||||
uint8_t *code = plugin->pcode;
|
||||
uint8_t *cip;
|
||||
uint8_t *end_cip = plugin->pcode + plugin->pcode_size;
|
||||
OPCODE op;
|
||||
int op_c;
|
||||
uint32_t reloc_count = 0;
|
||||
|
||||
/* FIRST PASS (light load) - Get initial opcode information */
|
||||
for (cip = code; cip < end_cip;)
|
||||
{
|
||||
op = (OPCODE)*(ucell_t *)cip;
|
||||
if ((unsigned)op >= OP_NUM_OPCODES)
|
||||
{
|
||||
AbortCompilation(co);
|
||||
*err = SP_ERR_INVALID_INSTRUCTION;
|
||||
return NULL;
|
||||
}
|
||||
cip += sizeof(cell_t);
|
||||
op_c = OpAdvTable[op];
|
||||
if (op_c >= 0)
|
||||
{
|
||||
cip += op_c;
|
||||
} else if (op_c == -3) {
|
||||
AbortCompilation(co);
|
||||
*err = SP_ERR_INVALID_INSTRUCTION;
|
||||
return NULL;
|
||||
} else if (op_c == -2) {
|
||||
reloc_count++;
|
||||
cip += sizeof(cell_t);
|
||||
} else if (op_c == -1) {
|
||||
switch (op)
|
||||
{
|
||||
case OP_SYSREQ_C:
|
||||
case OP_SYSREQ_PRI:
|
||||
case OP_SYSREQ_N:
|
||||
{
|
||||
if (!data->always_inline)
|
||||
{
|
||||
reloc_count++;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case OP_CASETBL:
|
||||
{
|
||||
ucell_t num = *(ucell_t *)cip;
|
||||
cip += sizeof(cell_t);
|
||||
reloc_count += (num + 1);
|
||||
cip += ((2*num) + 1) * sizeof(cell_t);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
{
|
||||
AbortCompilation(co);
|
||||
*err = SP_ERR_INVALID_INSTRUCTION;
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
*err = SP_ERR_NONE;
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
const char *JITX86::GetVMName()
|
||||
{
|
||||
return "JIT (x86)";
|
||||
|
||||
@ -8,24 +8,198 @@ using namespace SourcePawn;
|
||||
class CompData : public ICompilation
|
||||
{
|
||||
public:
|
||||
CompData() : plugin(NULL), debug(false)
|
||||
CompData() : plugin(NULL), debug(false), always_inline(true)
|
||||
{
|
||||
};
|
||||
public:
|
||||
sp_plugin_t *plugin;
|
||||
bool always_inline;
|
||||
bool debug;
|
||||
};
|
||||
|
||||
class JITX86 : public IVirtualMachine
|
||||
{
|
||||
public:
|
||||
JITX86();
|
||||
public:
|
||||
const char *GetVMName() =0;
|
||||
ICompilation *StartCompilation(sp_plugin_t *plugin);
|
||||
bool SetCompilationOption(ICompilation *co, const char *key, const char *val) ;
|
||||
IPluginContext *CompileToContext(ICompilation *co);
|
||||
IPluginContext *CompileToContext(ICompilation *co, int *err);
|
||||
void AbortCompilation(ICompilation *co);
|
||||
void FreeContextVars(sp_context_t *ctx);
|
||||
int ContextExecute(sp_context_t *ctx, uint32_t code_idx, cell_t *result);
|
||||
};
|
||||
|
||||
typedef enum
|
||||
{
|
||||
OP_NONE, /* invalid opcode */
|
||||
OP_LOAD_PRI, //DONE
|
||||
OP_LOAD_ALT, //DONE
|
||||
OP_LOAD_S_PRI, //DONE
|
||||
OP_LOAD_S_ALT, //DONE
|
||||
OP_LREF_PRI, //DONE
|
||||
OP_LREF_ALT, //DONE
|
||||
OP_LREF_S_PRI, //DONE
|
||||
OP_LREF_S_ALT, //DONE
|
||||
OP_LOAD_I, //DONE
|
||||
OP_LODB_I,
|
||||
OP_CONST_PRI, //DONE
|
||||
OP_CONST_ALT, //DONE
|
||||
OP_ADDR_PRI, //DONE
|
||||
OP_ADDR_ALT, //DONE
|
||||
OP_STOR_PRI, //DONE
|
||||
OP_STOR_ALT, //DONE
|
||||
OP_STOR_S_PRI, //DONE
|
||||
OP_STOR_S_ALT, //DONE
|
||||
OP_SREF_PRI, //DONE
|
||||
OP_SREF_ALT, //DONE
|
||||
OP_SREF_S_PRI, //DONE
|
||||
OP_SREF_S_ALT, //DONE
|
||||
OP_STOR_I, //DONE
|
||||
OP_STRB_I,
|
||||
OP_LIDX, //DONE
|
||||
OP_LIDX_B,
|
||||
OP_IDXADDR, //DONE
|
||||
OP_IDXADDR_B,
|
||||
OP_ALIGN_PRI, //DONE
|
||||
OP_ALIGN_ALT, //DONE
|
||||
OP_LCTRL,
|
||||
OP_SCTRL,
|
||||
OP_MOVE_PRI, //DONE
|
||||
OP_MOVE_ALT, //DONE
|
||||
OP_XCHG, //DONE
|
||||
OP_PUSH_PRI, //DONE
|
||||
OP_PUSH_ALT, //DONE
|
||||
OP_PUSH_R, //DONE
|
||||
OP_PUSH_C, //DONE
|
||||
OP_PUSH, //DONE
|
||||
OP_PUSH_S, //DONE
|
||||
OP_POP_PRI, //DONE
|
||||
OP_POP_ALT, //DONE
|
||||
OP_STACK, //DONE
|
||||
OP_HEAP, //DONE
|
||||
OP_PROC, //DONE
|
||||
OP_RET,
|
||||
OP_RETN, //DONE
|
||||
OP_CALL,
|
||||
OP_CALL_PRI,
|
||||
OP_JUMP, //DONE
|
||||
OP_JREL, //DONE
|
||||
OP_JZER, //DONE
|
||||
OP_JNZ, //DONE
|
||||
OP_JEQ, //DONE
|
||||
OP_JNEQ, //DONE
|
||||
OP_JLESS, //DONE
|
||||
OP_JLEQ, //DONE
|
||||
OP_JGRTR, //DONE
|
||||
OP_JGEQ, //DONE
|
||||
OP_JSLESS, //DONE
|
||||
OP_JSLEQ, //DONE
|
||||
OP_JSGRTR, //DONE
|
||||
OP_JSGEQ, //DONE
|
||||
OP_SHL, //DONE
|
||||
OP_SHR, //DONE
|
||||
OP_SSHR, //DONE
|
||||
OP_SHL_C_PRI, //DONE
|
||||
OP_SHL_C_ALT, //DONE
|
||||
OP_SHR_C_PRI, //DONE
|
||||
OP_SHR_C_ALT, //DONE
|
||||
OP_SMUL, //DONE
|
||||
OP_SDIV, //DONE
|
||||
OP_SDIV_ALT, //DONE
|
||||
OP_UMUL, //DONE
|
||||
OP_UDIV, //DONE
|
||||
OP_UDIV_ALT, //DONE
|
||||
OP_ADD, //DONE
|
||||
OP_SUB, //DONE
|
||||
OP_SUB_ALT, //DONE
|
||||
OP_AND, //DONE
|
||||
OP_OR, //DONE
|
||||
OP_XOR, //DONE
|
||||
OP_NOT, //DONE
|
||||
OP_NEG, //DONE
|
||||
OP_INVERT, //DONE
|
||||
OP_ADD_C, //DONE
|
||||
OP_SMUL_C, //DONE
|
||||
OP_ZERO_PRI, //DONE
|
||||
OP_ZERO_ALT, //DONE
|
||||
OP_ZERO, //DONE
|
||||
OP_ZERO_S, //DONE
|
||||
OP_SIGN_PRI, //DONE
|
||||
OP_SIGN_ALT, //DONE
|
||||
OP_EQ, //DONE
|
||||
OP_NEQ, //DONE
|
||||
OP_LESS, //DONE
|
||||
OP_LEQ, //DONE
|
||||
OP_GRTR, //DONE
|
||||
OP_GEQ, //DONE
|
||||
OP_SLESS, //DONE
|
||||
OP_SLEQ, //DONE
|
||||
OP_SGRTR, //DONE
|
||||
OP_SGEQ, //DONE
|
||||
OP_EQ_C_PRI, //DONE
|
||||
OP_EQ_C_ALT, //DONE
|
||||
OP_INC_PRI, //DONE
|
||||
OP_INC_ALT, //DONE
|
||||
OP_INC, //DONE
|
||||
OP_INC_S, //DONE
|
||||
OP_INC_I, //DONE
|
||||
OP_DEC_PRI, //DONE
|
||||
OP_DEC_ALT, //DONE
|
||||
OP_DEC, //DONE
|
||||
OP_DEC_S, //DONE
|
||||
OP_DEC_I, //DONE
|
||||
OP_MOVS, //DONE
|
||||
OP_CMPS, //DONE
|
||||
OP_FILL, //DONE
|
||||
OP_HALT, //DONE
|
||||
OP_BOUNDS,
|
||||
OP_SYSREQ_PRI,
|
||||
OP_SYSREQ_C,
|
||||
OP_FILE,
|
||||
OP_LINE,
|
||||
OP_SYMBOL,
|
||||
OP_SRANGE,
|
||||
OP_JUMP_PRI,
|
||||
OP_SWITCH,
|
||||
OP_CASETBL, //DONE
|
||||
OP_SWAP_PRI, //DONE
|
||||
OP_SWAP_ALT, //DONE
|
||||
OP_PUSH_ADR, //DONE
|
||||
OP_NOP, //DONE
|
||||
OP_SYSREQ_N,
|
||||
OP_SYMTAG,
|
||||
OP_BREAK,
|
||||
OP_PUSH2_C, //DONE
|
||||
OP_PUSH2, //DONE
|
||||
OP_PUSH2_S, //DONE
|
||||
OP_PUSH2_ADR, //DONE
|
||||
OP_PUSH3_C, //DONE
|
||||
OP_PUSH3, //DONE
|
||||
OP_PUSH3_S, //DONE
|
||||
OP_PUSH3_ADR, //DONE
|
||||
OP_PUSH4_C, //DONE
|
||||
OP_PUSH4, //DONE
|
||||
OP_PUSH4_S, //DONE
|
||||
OP_PUSH4_ADR, //DONE
|
||||
OP_PUSH5_C, //DONE
|
||||
OP_PUSH5, //DONE
|
||||
OP_PUSH5_S, //DONE
|
||||
OP_PUSH5_ADR, //DONE
|
||||
OP_LOAD_BOTH,
|
||||
OP_LOAD_S_BOTH,
|
||||
OP_CONST,
|
||||
OP_CONST_S,
|
||||
/* ----- */
|
||||
OP_SYSREQ_D,
|
||||
OP_SYSREQ_ND,
|
||||
/* ----- */
|
||||
OP_HEAP_PRI,
|
||||
OP_PUSH_HEAP_C,
|
||||
OP_POP_HEAP_PRI,
|
||||
/* ----- */
|
||||
OP_NUM_OPCODES
|
||||
} OPCODE;
|
||||
|
||||
#endif //_INCLUDE_SOURCEPAWN_JIT_X86_H_
|
||||
|
||||
@ -187,10 +187,6 @@
|
||||
/>
|
||||
</FileConfiguration>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\..\jit_helpers.cpp"
|
||||
>
|
||||
</File>
|
||||
<File
|
||||
RelativePath="..\jit_x86.cpp"
|
||||
>
|
||||
|
||||
@ -1,6 +1,8 @@
|
||||
#ifndef _INCLUDE_JIT_X86_MACROS_H
|
||||
#define _INCLUDE_JIT_X86_MACROS_H
|
||||
|
||||
#include "..\jit_helpers.h"
|
||||
|
||||
//MOD R/M
|
||||
#define MOD_MEM_REG 0
|
||||
#define MOD_DISP8 1
|
||||
@ -134,544 +136,544 @@ inline jit_uint8_t ia32_sib(jit_uint8_t mode, jit_uint8_t index, jit_uint8_t bas
|
||||
* INCREMENT/DECREMENT *
|
||||
***********************/
|
||||
|
||||
inline void IA32_Inc_Rm_Disp32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t disp)
|
||||
inline void IA32_Inc_Rm_Disp32(JitWriter *jit, jit_uint8_t reg, jit_int32_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_INC_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, reg));
|
||||
jit->wrfuncs.write_int32(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_INC_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, reg));
|
||||
jit->write_int32(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Inc_Rm_Disp8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t disp)
|
||||
inline void IA32_Inc_Rm_Disp8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_INC_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, reg));
|
||||
jit->wrfuncs.write_byte(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_INC_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, reg));
|
||||
jit->write_byte(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Inc_Rm_Disp_Reg(jitinfo_t *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
|
||||
inline void IA32_Inc_Rm_Disp_Reg(JitWriter *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_INC_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, reg, base));
|
||||
jit->write_ubyte(jit, IA32_INC_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(scale, reg, base));
|
||||
}
|
||||
|
||||
inline void IA32_Inc_Reg(jitinfo_t *jit, jit_uint8_t reg)
|
||||
inline void IA32_Inc_Reg(JitWriter *jit, jit_uint8_t reg)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_INC_REG+reg);
|
||||
jit->write_ubyte(jit, IA32_INC_REG+reg);
|
||||
}
|
||||
|
||||
inline void IA32_Dec_Rm_Disp32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t disp)
|
||||
inline void IA32_Dec_Rm_Disp32(JitWriter *jit, jit_uint8_t reg, jit_int32_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_DEC_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 1, reg));
|
||||
jit->wrfuncs.write_int32(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_DEC_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 1, reg));
|
||||
jit->write_int32(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Dec_Rm_Disp8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t disp)
|
||||
inline void IA32_Dec_Rm_Disp8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_DEC_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 1, reg));
|
||||
jit->wrfuncs.write_byte(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_DEC_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 1, reg));
|
||||
jit->write_byte(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Dec_Rm_Disp_Reg(jitinfo_t *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
|
||||
inline void IA32_Dec_Rm_Disp_Reg(JitWriter *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_DEC_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 1, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, reg, base));
|
||||
jit->write_ubyte(jit, IA32_DEC_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 1, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(scale, reg, base));
|
||||
}
|
||||
|
||||
inline void IA32_Dec_Reg(jitinfo_t *jit, jit_uint8_t reg)
|
||||
inline void IA32_Dec_Reg(JitWriter *jit, jit_uint8_t reg)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_DEC_REG+reg);
|
||||
jit->write_ubyte(jit, IA32_DEC_REG+reg);
|
||||
}
|
||||
|
||||
/****************
|
||||
* BINARY LOGIC *
|
||||
****************/
|
||||
|
||||
inline void IA32_Xor_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t dest_mode)
|
||||
inline void IA32_Xor_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t dest_mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_XOR_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(dest_mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_XOR_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(dest_mode, src, dest));
|
||||
}
|
||||
|
||||
inline void IA32_Xor_Eax_Imm32(jitinfo_t *jit, jit_int32_t value)
|
||||
inline void IA32_Xor_Eax_Imm32(JitWriter *jit, jit_int32_t value)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_XOR_EAX_IMM32);
|
||||
jit->wrfuncs.write_int32(jit, value);
|
||||
jit->write_ubyte(jit, IA32_XOR_EAX_IMM32);
|
||||
jit->write_int32(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Xor_Rm_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
|
||||
inline void IA32_Xor_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_XOR_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 6, reg));
|
||||
jit->wrfuncs.write_int32(jit, value);
|
||||
jit->write_ubyte(jit, IA32_XOR_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 6, reg));
|
||||
jit->write_int32(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Xor_Rm_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
|
||||
inline void IA32_Xor_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_XOR_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 6, reg));
|
||||
jit->wrfuncs.write_byte(jit, value);
|
||||
jit->write_ubyte(jit, IA32_XOR_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 6, reg));
|
||||
jit->write_byte(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Neg_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_Neg_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_NEG_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 3, reg));
|
||||
jit->write_ubyte(jit, IA32_NEG_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 3, reg));
|
||||
}
|
||||
|
||||
inline void IA32_Or_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_Or_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_OR_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_OR_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
}
|
||||
|
||||
inline void IA32_And_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_And_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_AND_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_AND_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
}
|
||||
|
||||
inline void IA32_Not_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_Not_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_NOT_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 2, reg));
|
||||
jit->write_ubyte(jit, IA32_NOT_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 2, reg));
|
||||
}
|
||||
|
||||
inline void IA32_Shr_Rm_Imm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
|
||||
inline void IA32_Shr_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SHR_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, dest));
|
||||
jit->wrfuncs.write_ubyte(jit, value);
|
||||
jit->write_ubyte(jit, IA32_SHR_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 5, dest));
|
||||
jit->write_ubyte(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Shl_Rm_Imm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
|
||||
inline void IA32_Shl_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SHL_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 4, dest));
|
||||
jit->wrfuncs.write_ubyte(jit, value);
|
||||
jit->write_ubyte(jit, IA32_SHL_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 4, dest));
|
||||
jit->write_ubyte(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Sar_Rm_Imm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
|
||||
inline void IA32_Sar_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SAR_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, dest));
|
||||
jit->wrfuncs.write_ubyte(jit, value);
|
||||
jit->write_ubyte(jit, IA32_SAR_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 7, dest));
|
||||
jit->write_ubyte(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Sar_Rm_CL(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_Sar_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SAR_RM_CL);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, reg));
|
||||
jit->write_ubyte(jit, IA32_SAR_RM_CL);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 7, reg));
|
||||
}
|
||||
|
||||
inline void IA32_Shr_Rm_CL(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_Shr_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SHR_RM_CL);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
jit->write_ubyte(jit, IA32_SHR_RM_CL);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
}
|
||||
|
||||
inline void IA32_Shl_Rm_CL(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_Shl_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SHL_RM_CL);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 4, reg));
|
||||
jit->write_ubyte(jit, IA32_SHL_RM_CL);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 4, reg));
|
||||
}
|
||||
|
||||
inline void IA32_Xchg_Eax_Reg(jitinfo_t *jit, jit_uint8_t reg)
|
||||
inline void IA32_Xchg_Eax_Reg(JitWriter *jit, jit_uint8_t reg)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_XCHG_EAX_REG+reg);
|
||||
jit->write_ubyte(jit, IA32_XCHG_EAX_REG+reg);
|
||||
}
|
||||
|
||||
inline void IA32_Xchg_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_Xchg_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_XCHG_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_XCHG_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
}
|
||||
|
||||
/**********************
|
||||
* ARITHMETIC (BASIC) *
|
||||
**********************/
|
||||
|
||||
inline void IA32_Add_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_Add_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
}
|
||||
|
||||
inline void IA32_Add_Rm_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t value, jit_uint8_t mode)
|
||||
inline void IA32_Add_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t value, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->wrfuncs.write_byte(jit, value);
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->write_byte(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Add_Rm_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t value, jit_uint8_t mode)
|
||||
inline void IA32_Add_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t value, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->wrfuncs.write_int32(jit, value);
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->write_int32(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Add_Eax_Imm32(jitinfo_t *jit, jit_int32_t value)
|
||||
inline void IA32_Add_Eax_Imm32(JitWriter *jit, jit_int32_t value)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_EAX_IMM32);
|
||||
jit->wrfuncs.write_int32(jit, value);
|
||||
jit->write_ubyte(jit, IA32_ADD_EAX_IMM32);
|
||||
jit->write_int32(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Sub_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_Sub_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_SUB_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
}
|
||||
|
||||
inline void IA32_Sub_Rm_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t val, jit_uint8_t mode)
|
||||
inline void IA32_Sub_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t val, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Sub_Rm_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t val, jit_uint8_t mode)
|
||||
inline void IA32_Sub_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t val, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
jit->wrfuncs.write_int32(jit, val);
|
||||
jit->write_ubyte(jit, IA32_SUB_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
jit->write_int32(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Div_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_Div_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_DIV_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 6, reg));
|
||||
jit->write_ubyte(jit, IA32_DIV_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 6, reg));
|
||||
}
|
||||
|
||||
inline void IA32_IDiv_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_IDiv_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_IDIV_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, reg));
|
||||
jit->write_ubyte(jit, IA32_IDIV_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 7, reg));
|
||||
}
|
||||
|
||||
inline void IA32_Mul_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_Mul_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MUL_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 4, reg));
|
||||
jit->write_ubyte(jit, IA32_MUL_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 4, reg));
|
||||
}
|
||||
|
||||
inline void IA32_IMul_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
inline void IA32_IMul_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_IMUL_RM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
jit->write_ubyte(jit, IA32_IMUL_RM);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
|
||||
}
|
||||
|
||||
inline void IA32_IMul_Reg_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
|
||||
inline void IA32_IMul_Reg_Imm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_IMUL_REG_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->wrfuncs.write_byte(jit, value);
|
||||
jit->write_ubyte(jit, IA32_IMUL_REG_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->write_byte(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_IMul_Reg_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
|
||||
inline void IA32_IMul_Reg_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_IMUL_REG_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->wrfuncs.write_int32(jit, value);
|
||||
jit->write_ubyte(jit, IA32_IMUL_REG_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
|
||||
jit->write_int32(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_Add_Rm_Reg_Disp8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
|
||||
inline void IA32_Add_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
|
||||
jit->wrfuncs.write_byte(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
|
||||
jit->write_byte(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Add_Rm_Imm8_Disp8(jitinfo_t *jit,
|
||||
inline void IA32_Add_Rm_Imm8_Disp8(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_int8_t val,
|
||||
jit_int8_t disp8)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
|
||||
jit->wrfuncs.write_byte(jit, disp8);
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
|
||||
jit->write_byte(jit, disp8);
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Add_Rm_Imm32_Disp8(jitinfo_t *jit,
|
||||
inline void IA32_Add_Rm_Imm32_Disp8(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_int32_t val,
|
||||
jit_int8_t disp8)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
|
||||
jit->wrfuncs.write_byte(jit, disp8);
|
||||
jit->wrfuncs.write_int32(jit, val);
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
|
||||
jit->write_byte(jit, disp8);
|
||||
jit->write_int32(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Add_Rm_Imm8_Disp32(jitinfo_t *jit,
|
||||
inline void IA32_Add_Rm_Imm8_Disp32(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_int8_t val,
|
||||
jit_int32_t disp32)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
|
||||
jit->wrfuncs.write_int32(jit, disp32);
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
|
||||
jit->write_int32(jit, disp32);
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Add_Rm_Imm8_Disp_Reg(jitinfo_t *jit,
|
||||
inline void IA32_Add_Rm_Imm8_Disp_Reg(JitWriter *jit,
|
||||
jit_uint8_t dest_base,
|
||||
jit_uint8_t dest_index,
|
||||
jit_uint8_t dest_scale,
|
||||
jit_int8_t val)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Sub_Rm_Imm8_Disp8(jitinfo_t *jit,
|
||||
inline void IA32_Sub_Rm_Imm8_Disp8(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_int8_t val,
|
||||
jit_int8_t disp8)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 5, dest));
|
||||
jit->wrfuncs.write_byte(jit, disp8);
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 5, dest));
|
||||
jit->write_byte(jit, disp8);
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Sub_Rm_Imm8_Disp32(jitinfo_t *jit,
|
||||
inline void IA32_Sub_Rm_Imm8_Disp32(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_int8_t val,
|
||||
jit_int32_t disp32)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 5, dest));
|
||||
jit->wrfuncs.write_int32(jit, disp32);
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 5, dest));
|
||||
jit->write_int32(jit, disp32);
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Sub_Rm_Imm8_Disp_Reg(jitinfo_t *jit,
|
||||
inline void IA32_Sub_Rm_Imm8_Disp_Reg(JitWriter *jit,
|
||||
jit_uint8_t dest_base,
|
||||
jit_uint8_t dest_index,
|
||||
jit_uint8_t dest_scale,
|
||||
jit_int8_t val)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 5, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 5, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
/**
|
||||
* Memory Instructions
|
||||
*/
|
||||
|
||||
inline void IA32_Lea_Reg_DispRegMult(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_uint8_t src_index, jit_uint8_t scale)
|
||||
inline void IA32_Lea_Reg_DispRegMult(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_uint8_t src_index, jit_uint8_t scale)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, src_index, src_base));
|
||||
jit->write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(scale, src_index, src_base));
|
||||
}
|
||||
|
||||
inline void IA32_Lea_Reg_DispRegMultImm8(jitinfo_t *jit,
|
||||
inline void IA32_Lea_Reg_DispRegMultImm8(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_uint8_t src_base,
|
||||
jit_uint8_t src_index,
|
||||
jit_uint8_t scale,
|
||||
jit_int8_t val)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, src_index, src_base));
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(scale, src_index, src_base));
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Lea_DispRegImm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int8_t val)
|
||||
inline void IA32_Lea_DispRegImm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int8_t val)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, MOD_MEM_REG));
|
||||
jit->wrfuncs.write_byte(jit, val);
|
||||
jit->write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, MOD_MEM_REG));
|
||||
jit->write_byte(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Lea_DispRegImm32(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int32_t val)
|
||||
inline void IA32_Lea_DispRegImm32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int32_t val)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, MOD_MEM_REG));
|
||||
jit->wrfuncs.write_int32(jit, val);
|
||||
jit->write_ubyte(jit, IA32_LEA_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, MOD_MEM_REG));
|
||||
jit->write_int32(jit, val);
|
||||
}
|
||||
|
||||
/**
|
||||
* Stack Instructions
|
||||
*/
|
||||
|
||||
inline void IA32_Pop_Reg(jitinfo_t *jit, jit_uint8_t reg)
|
||||
inline void IA32_Pop_Reg(JitWriter *jit, jit_uint8_t reg)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_POP_REG+reg);
|
||||
jit->write_ubyte(jit, IA32_POP_REG+reg);
|
||||
}
|
||||
|
||||
inline void IA32_Push_Reg(jitinfo_t *jit, jit_uint8_t reg)
|
||||
inline void IA32_Push_Reg(JitWriter *jit, jit_uint8_t reg)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_PUSH_REG+reg);
|
||||
jit->write_ubyte(jit, IA32_PUSH_REG+reg);
|
||||
}
|
||||
|
||||
/**
|
||||
* Moving from REGISTER/MEMORY to REGISTER
|
||||
*/
|
||||
|
||||
inline void IA32_Mov_Reg_Rm(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_Mov_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, dest, src));
|
||||
jit->write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, dest, src));
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Reg_Rm_Disp8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
|
||||
inline void IA32_Mov_Reg_Rm_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, src));
|
||||
jit->wrfuncs.write_byte(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, src));
|
||||
jit->write_byte(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Reg_Rm_Disp32(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
|
||||
inline void IA32_Mov_Reg_Rm_Disp32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, src));
|
||||
jit->wrfuncs.write_int32(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, src));
|
||||
jit->write_int32(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Reg_Rm_Disp_Reg(jitinfo_t *jit,
|
||||
inline void IA32_Mov_Reg_Rm_Disp_Reg(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_uint8_t src_base,
|
||||
jit_uint8_t src_index,
|
||||
jit_uint8_t src_scale)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(src_scale, src_index, src_base));
|
||||
jit->write_ubyte(jit, IA32_MOV_REG_MEM);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(src_scale, src_index, src_base));
|
||||
}
|
||||
|
||||
/**
|
||||
* Moving from REGISTER to REGISTER/MEMORY
|
||||
*/
|
||||
|
||||
inline void IA32_Mov_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_Mov_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Rm_Reg_Disp8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
|
||||
inline void IA32_Mov_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
|
||||
jit->wrfuncs.write_byte(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
|
||||
jit->write_byte(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Rm_Reg_Disp32(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
|
||||
inline void IA32_Mov_Rm_Reg_Disp32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, src, dest));
|
||||
jit->wrfuncs.write_int32(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, src, dest));
|
||||
jit->write_int32(jit, disp);
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Rm_Reg_Disp_Reg(jitinfo_t *jit,
|
||||
inline void IA32_Mov_Rm_Reg_Disp_Reg(JitWriter *jit,
|
||||
jit_uint8_t dest_base,
|
||||
jit_uint8_t dest_index,
|
||||
jit_uint8_t dest_scale,
|
||||
jit_uint8_t src)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, src, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
jit->write_ubyte(jit, IA32_MOV_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, src, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
}
|
||||
|
||||
/**
|
||||
* Moving from IMMEDIATE to REGISTER
|
||||
*/
|
||||
|
||||
inline void IA32_Mov_Reg_Imm32(jitinfo_t *jit, jit_uint8_t dest, jit_int32_t num)
|
||||
inline void IA32_Mov_Reg_Imm32(JitWriter *jit, jit_uint8_t dest, jit_int32_t num)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_IMM+dest);
|
||||
jit->wrfuncs.write_int32(jit, num);
|
||||
jit->write_ubyte(jit, IA32_MOV_REG_IMM+dest);
|
||||
jit->write_int32(jit, num);
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Rm_Imm32_Disp8(jitinfo_t *jit,
|
||||
inline void IA32_Mov_Rm_Imm32_Disp8(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_int32_t val,
|
||||
jit_int8_t disp8)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
|
||||
jit->wrfuncs.write_byte(jit, disp8);
|
||||
jit->wrfuncs.write_int32(jit, val);
|
||||
jit->write_ubyte(jit, IA32_MOV_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
|
||||
jit->write_byte(jit, disp8);
|
||||
jit->write_int32(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Rm_Imm32_Disp32(jitinfo_t *jit,
|
||||
inline void IA32_Mov_Rm_Imm32_Disp32(JitWriter *jit,
|
||||
jit_uint8_t dest,
|
||||
jit_int32_t val,
|
||||
jit_int32_t disp32)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
|
||||
jit->wrfuncs.write_int32(jit, disp32);
|
||||
jit->wrfuncs.write_int32(jit, val);
|
||||
jit->write_ubyte(jit, IA32_MOV_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
|
||||
jit->write_int32(jit, disp32);
|
||||
jit->write_int32(jit, val);
|
||||
}
|
||||
|
||||
inline void IA32_Mov_Rm_Imm32_Disp_Reg(jitinfo_t *jit,
|
||||
inline void IA32_Mov_Rm_Imm32_Disp_Reg(JitWriter *jit,
|
||||
jit_uint8_t dest_base,
|
||||
jit_uint8_t dest_index,
|
||||
jit_uint8_t dest_scale,
|
||||
jit_int32_t val)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
jit->wrfuncs.write_int32(jit, val);
|
||||
jit->write_ubyte(jit, IA32_MOV_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
|
||||
jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
|
||||
jit->write_int32(jit, val);
|
||||
}
|
||||
|
||||
/**
|
||||
* Branching/Jumping
|
||||
*/
|
||||
|
||||
inline jitoffs_t IA32_Jump_Cond_Imm8(jitinfo_t *jit, jit_uint8_t cond, jit_int8_t disp)
|
||||
inline jitoffs_t IA32_Jump_Cond_Imm8(JitWriter *jit, jit_uint8_t cond, jit_int8_t disp)
|
||||
{
|
||||
jitoffs_t ptr;
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_JCC_IMM+cond);
|
||||
ptr = (jit->outptr-jit->outbase);
|
||||
jit->wrfuncs.write_byte(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_JCC_IMM+cond);
|
||||
ptr = jit->jit_curpos();
|
||||
jit->write_byte(jit, disp);
|
||||
return ptr;
|
||||
}
|
||||
|
||||
inline jitoffs_t IA32_Jump_Imm32(jitinfo_t *jit, jit_int32_t disp)
|
||||
inline jitoffs_t IA32_Jump_Imm32(JitWriter *jit, jit_int32_t disp)
|
||||
{
|
||||
jitoffs_t ptr;
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_JMP_IMM32);
|
||||
ptr = (jit->outptr-jit->outbase);
|
||||
jit->wrfuncs.write_int32(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_JMP_IMM32);
|
||||
ptr = jit->jit_curpos();
|
||||
jit->write_int32(jit, disp);
|
||||
return ptr;
|
||||
}
|
||||
|
||||
inline jitoffs_t IA32_Jump_Cond_Imm32(jitinfo_t *jit, jit_uint8_t cond, jit_int32_t disp)
|
||||
inline jitoffs_t IA32_Jump_Cond_Imm32(JitWriter *jit, jit_uint8_t cond, jit_int32_t disp)
|
||||
{
|
||||
jitoffs_t ptr;
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_JCC_IMM32_1);
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_JCC_IMM32_2+cond);
|
||||
ptr = (jit->outptr-jit->outbase);
|
||||
jit->wrfuncs.write_int32(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_JCC_IMM32_1);
|
||||
jit->write_ubyte(jit, IA32_JCC_IMM32_2+cond);
|
||||
ptr = jit->jit_curpos();
|
||||
jit->write_int32(jit, disp);
|
||||
return ptr;
|
||||
}
|
||||
|
||||
inline jitoffs_t IA32_Call_Imm32(jitinfo_t *jit, jit_int32_t disp)
|
||||
inline jitoffs_t IA32_Call_Imm32(JitWriter *jit, jit_int32_t disp)
|
||||
{
|
||||
jitoffs_t ptr;
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_CALL_IMM32);
|
||||
ptr = (jit->outptr-jit->outbase);
|
||||
jit->wrfuncs.write_int32(jit, disp);
|
||||
jit->write_ubyte(jit, IA32_CALL_IMM32);
|
||||
ptr = jit->jit_curpos();
|
||||
jit->write_int32(jit, disp);
|
||||
return ptr;
|
||||
}
|
||||
|
||||
inline void IA32_Write_Jump8(jitinfo_t *jit, jitoffs_t jmp, jitoffs_t target)
|
||||
inline void IA32_Write_Jump8(JitWriter *jit, jitoffs_t jmp, jitoffs_t target)
|
||||
{
|
||||
//save old ptr
|
||||
jitcode_t oldptr = jit->outptr;
|
||||
@ -679,92 +681,92 @@ inline void IA32_Write_Jump8(jitinfo_t *jit, jitoffs_t jmp, jitoffs_t target)
|
||||
jit_int8_t diff = (target - (jmp + 1));
|
||||
//overwrite old value
|
||||
jit->outptr = jit->outbase + jmp;
|
||||
jit->wrfuncs.write_byte(jit, diff);
|
||||
jit->write_byte(jit, diff);
|
||||
//restore old ptr
|
||||
jit->outptr = oldptr;
|
||||
}
|
||||
|
||||
inline void IA32_Send_Jump8_Here(jitinfo_t *jit, jitoffs_t jmp)
|
||||
inline void IA32_Send_Jump8_Here(JitWriter *jit, jitoffs_t jmp)
|
||||
{
|
||||
jitoffs_t curptr = jit->wrfuncs.jit_curpos(jit);
|
||||
jitoffs_t curptr = jit->jit_curpos(jit);
|
||||
IA32_Write_Jump8(jit, jmp, curptr);
|
||||
}
|
||||
|
||||
inline void IA32_Return(jitinfo_t *jit)
|
||||
inline void IA32_Return(JitWriter *jit)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_RET);
|
||||
jit->write_ubyte(jit, IA32_RET);
|
||||
}
|
||||
|
||||
inline void IA32_Test_Rm_Reg(jitinfo_t *jit, jit_uint8_t reg1, jit_uint8_t reg2, jit_uint8_t mode)
|
||||
inline void IA32_Test_Rm_Reg(JitWriter *jit, jit_uint8_t reg1, jit_uint8_t reg2, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_TEST_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, reg2, reg1));
|
||||
jit->write_ubyte(jit, IA32_TEST_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, reg2, reg1));
|
||||
}
|
||||
|
||||
inline void IA32_Cmp_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
inline void IA32_Cmp_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_REG);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
jit->write_ubyte(jit, IA32_CMP_RM_REG);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
|
||||
}
|
||||
|
||||
inline void IA32_Cmp_Rm_Imm8(jitinfo_t *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int8_t imm8)
|
||||
inline void IA32_Cmp_Rm_Imm8(JitWriter *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int8_t imm8)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, rm));
|
||||
jit->wrfuncs.write_byte(jit, imm8);
|
||||
jit->write_ubyte(jit, IA32_CMP_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 7, rm));
|
||||
jit->write_byte(jit, imm8);
|
||||
}
|
||||
|
||||
inline void IA32_Cmp_Rm_Imm32(jitinfo_t *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int32_t imm32)
|
||||
inline void IA32_Cmp_Rm_Imm32(JitWriter *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int32_t imm32)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_IMM32);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, rm));
|
||||
jit->wrfuncs.write_int32(jit, imm32);
|
||||
jit->write_ubyte(jit, IA32_CMP_RM_IMM32);
|
||||
jit->write_ubyte(jit, ia32_modrm(mode, 7, rm));
|
||||
jit->write_int32(jit, imm32);
|
||||
}
|
||||
|
||||
inline void IA32_Cmp_Rm_Disp8_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t disp, jit_int8_t imm8)
|
||||
inline void IA32_Cmp_Rm_Disp8_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp, jit_int8_t imm8)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_IMM8);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 7, reg));
|
||||
jit->wrfuncs.write_byte(jit, disp);
|
||||
jit->wrfuncs.write_byte(jit, imm8);
|
||||
jit->write_ubyte(jit, IA32_CMP_RM_IMM8);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 7, reg));
|
||||
jit->write_byte(jit, disp);
|
||||
jit->write_byte(jit, imm8);
|
||||
}
|
||||
|
||||
inline void IA32_Cmp_Eax_Imm32(jitinfo_t *jit, jit_int32_t value)
|
||||
inline void IA32_Cmp_Eax_Imm32(JitWriter *jit, jit_int32_t value)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_CMP_EAX_IMM32);
|
||||
jit->wrfuncs.write_int32(jit, value);
|
||||
jit->write_ubyte(jit, IA32_CMP_EAX_IMM32);
|
||||
jit->write_int32(jit, value);
|
||||
}
|
||||
|
||||
inline void IA32_SetCC_Rm8(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t cond)
|
||||
inline void IA32_SetCC_Rm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t cond)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SETCC_RM8_1);
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_SETCC_RM8_2+cond);
|
||||
jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_REG, 0, reg));
|
||||
jit->write_ubyte(jit, IA32_SETCC_RM8_1);
|
||||
jit->write_ubyte(jit, IA32_SETCC_RM8_2+cond);
|
||||
jit->write_ubyte(jit, ia32_modrm(MOD_REG, 0, reg));
|
||||
}
|
||||
|
||||
inline void IA32_Rep(jitinfo_t *jit)
|
||||
inline void IA32_Rep(JitWriter *jit)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_REP);
|
||||
jit->write_ubyte(jit, IA32_REP);
|
||||
}
|
||||
|
||||
inline void IA32_Movsd(jitinfo_t *jit)
|
||||
inline void IA32_Movsd(JitWriter *jit)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOVSD);
|
||||
jit->write_ubyte(jit, IA32_MOVSD);
|
||||
}
|
||||
|
||||
inline void IA32_Movsb(jitinfo_t *jit)
|
||||
inline void IA32_Movsb(JitWriter *jit)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_MOVSB);
|
||||
jit->write_ubyte(jit, IA32_MOVSB);
|
||||
}
|
||||
|
||||
inline void IA32_Stosd(jitinfo_t *jit)
|
||||
inline void IA32_Stosd(JitWriter *jit)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_STOSD);
|
||||
jit->write_ubyte(jit, IA32_STOSD);
|
||||
}
|
||||
|
||||
inline void IA32_Cld(jitinfo_t *jit)
|
||||
inline void IA32_Cld(JitWriter *jit)
|
||||
{
|
||||
jit->wrfuncs.write_ubyte(jit, IA32_CLD);
|
||||
jit->write_ubyte(jit, IA32_CLD);
|
||||
}
|
||||
|
||||
#endif //_INCLUDE_JIT_X86_MACROS_H
|
||||
|
||||
Loading…
Reference in New Issue
Block a user