UNLOZE/sourcemod
8
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Changed StringToLocal to work with real strings

Browse Source 
moved out two .b opcodes out of the ungenerated group since now are needed for strings

--HG--
extra : convert_revision : svn%3A39bc706e-5318-0410-9160-8a85361fbb7c/trunk%40160
This commit is contained in:
Borja Ferrer
2006-11-07 13:06:04 +00:00
parent 2348f9106a
commit 453f0db476
8 changed files with 70 additions and 91 deletions
Download Patch File Download Diff File Expand all files Collapse all files
sourcepawn/vm/jit/x86/jit_x86.cpp
+49
View File
@@ -1093,6 +1093,30 @@ inline void WriteOp_Load_I(JitWriter *jit)
IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
}
inline void WriteOp_Lodb_I(JitWriter *jit)
{
Write_Check_VerifyAddr(jit, AMX_REG_PRI);
//mov eax, [ebp+eax]
IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
//and eax, <bitmask>
cell_t val = jit->read_cell();
switch(val)
{
case 1:
{
IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x000000FF);
break;
}
case 2:
{
IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x0000FFFF);
break;
}
}
}
inline void WriteOp_Stor_I(JitWriter *jit)
{
//mov [ebp+edx], eax
@@ -1100,6 +1124,31 @@ inline void WriteOp_Stor_I(JitWriter *jit)
IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
}
inline void WriteOp_Strb_I(JitWriter *jit)
{
Write_Check_VerifyAddr(jit, AMX_REG_ALT);
//mov [ebp+edx], eax
cell_t val = jit->read_cell();
switch (val)
{
case 1:
{
IA32_Mov_Rm8EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
break;
}
case 2:
{
IA32_Mov_Rm16EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
break;
}
case 4:
{
IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
break;
}
}
}
inline void WriteOp_Lidx(JitWriter *jit)
{
//lea eax, [edx+4*eax]
sourcepawn/vm/jit/x86/opcode_helpers.h
+5 -5
View File
@@ -104,7 +104,7 @@ typedef enum
OP_LREF_S_PRI, //VERIFIED
OP_LREF_S_ALT, //~VERIFIED (lref.s.pri)
OP_LOAD_I, //VERIFIED
OP_LODB_I, // !GEN :TODO: - only used for pack access - drop support in compiler first
OP_LODB_I, //VERIFIED
OP_CONST_PRI, //VERIFIED
OP_CONST_ALT, //~VERIFIED (const.pri)
OP_ADDR_PRI, //VERIFIED
@@ -118,7 +118,7 @@ typedef enum
OP_SREF_S_PRI, //VERIFIED
OP_SREF_S_ALT, //~VERIFIED (stor.s.alt)
OP_STOR_I, //VERIFIED
OP_STRB_I, // !GEN :TODO: - only used for pack access, drop support in compiler first
OP_STRB_I, //VERIFIED
OP_LIDX, //VERIFIED
OP_LIDX_B, //DONE
OP_IDXADDR, //VERIFIED
@@ -127,7 +127,7 @@ typedef enum
OP_ALIGN_ALT, // !GEN :TODO: - only used for pack access, drop support in compiler first
OP_LCTRL, // !GEN
OP_SCTRL, // !GEN
OP_MOVE_PRI, //DONE
OP_MOVE_PRI, //~VERIFIED (move.alt)
OP_MOVE_ALT, //VERIFIED
OP_XCHG, //DONE
OP_PUSH_PRI, //DONE
@@ -139,7 +139,7 @@ typedef enum
OP_POP_PRI, //VERIFIED
OP_POP_ALT, //VERIFIED
OP_STACK, //VERIFIED
OP_HEAP, //DONE
OP_HEAP, //VERIFIED
OP_PROC, //VERIFIED
OP_RET, // !GEN
OP_RETN, //VERIFIED
@@ -211,7 +211,7 @@ typedef enum
OP_DEC, //VERIFIED
OP_DEC_S, //VERIFIED
OP_DEC_I, //VERIFIED
OP_MOVS, //DONE
OP_MOVS, //VERIFIED
OP_CMPS, // !GEN
OP_FILL, //VERIFIED
OP_HALT, //DONE
sourcepawn/vm/jit/x86/opcode_switch.inc
+10
View File
@@ -508,11 +508,21 @@
WriteOp_Load_I(jit);
break;
}
case OP_LODB_I:
{
WriteOp_Lodb_I(jit);
break;
}
case OP_STOR_I:
{
WriteOp_Stor_I(jit);
break;
}
case OP_STRB_I:
{
WriteOp_Strb_I(jit);
break;
}
case OP_LIDX:
{
WriteOp_Lidx(jit);
sourcepawn/vm/jit/x86/ungen_opcode_switch.inc
-10
View File
@@ -33,16 +33,6 @@
WriteOp_Align_Alt(jit);
break;
}
case OP_LODB_I:
{
WriteOp_Lodb_I(jit);
break;
}
case OP_STRB_I:
{
WriteOp_Strb_I(jit);
break;
}
case OP_LCTRL:
{
WriteOp_Lctrl(jit);
sourcepawn/vm/jit/x86/ungen_opcodes.h
-49
View File
@@ -111,55 +111,6 @@ inline void WriteOp_Cmps(JitWriter *jit)
IA32_Pop_Reg(jit, REG_EDI);
}
inline void WriteOp_Lodb_I(JitWriter *jit)
{
Write_Check_VerifyAddr(jit, AMX_REG_PRI);
//mov eax, [ebp+eax]
IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
//and eax, <bitmask>
cell_t val = jit->read_cell();
switch(val)
{
case 1:
{
IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x000000FF);
break;
}
case 2:
{
IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x0000FFFF);
break;
}
}
}
inline void WriteOp_Strb_I(JitWriter *jit)
{
Write_Check_VerifyAddr(jit, AMX_REG_ALT);
//mov [ebp+edx], eax
cell_t val = jit->read_cell();
switch (val)
{
case 1:
{
IA32_Mov_Rm8EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
break;
}
case 2:
{
IA32_Mov_Rm16EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
break;
}
case 4:
{
IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
break;
}
}
}
inline void WriteOp_Lctrl(JitWriter *jit)
{
cell_t val = jit->read_cell();